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Tue, 24 Sep 2019 05:26:31 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXCHOV01.amd.com (165.204.84.17) by DM3NAM03FT017.mail.protection.outlook.com (10.152.82.201) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2284.20 via Frontend Transport; Tue, 24 Sep 2019 05:26:30 +0000 Received: from wayne-System-Product-Name.amd.com (10.180.168.240) by SATLEXCHOV01.amd.com (10.181.40.71) with Microsoft SMTP Server id 14.3.389.1; Tue, 24 Sep 2019 00:26:29 -0500 From: Wayne Lin To: , Subject: [PATCH] drm/drm_edid: correct VIC and HDMI_VIC under HDMI 2.0 Date: Tue, 24 Sep 2019 13:26:21 +0800 Message-ID: <20190924052621.6851-1-Wayne.Lin@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(136003)(346002)(39860400002)(396003)(376002)(428003)(189003)(199004)(478600001)(356004)(6666004)(36756003)(86362001)(48376002)(5660300002)(70586007)(47776003)(81166006)(1076003)(70206006)(81156014)(336012)(476003)(110136005)(486006)(450100002)(126002)(426003)(53416004)(54906003)(2616005)(2906002)(8676002)(16586007)(50466002)(8936002)(4326008)(305945005)(316002)(50226002)(186003)(26005)(51416003)(7696005); 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Ip=[165.204.84.17]; Helo=[SATLEXCHOV01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR1201MB0257 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HrfXooSI7V8ner9QDsrB5HGh1mP6mCJeELC8sn30kWI=; b=LzWW8d6UzcT+23nB2qzCC02x2Ku2GkgbebU6lMnk+lsZJ7Ap7uVhDn9nuzMAl0KGGYLy723+T7SpmiJfcXAuOLY03Ht/WM2BAHSE3+uecYepGG0N1gAGJQgHaeGapZMLjcj75jhrV2OxhIKcLwhdjRteqkFhKQwL/X59oGAgpH4= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sunpeng.Li@amd.com, Nicholas.Kazlauskas@amd.com, Wayne Lin Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In HDMI 1.4 defines 4k modes without specific aspect ratio. However, in HDMI 2.0, adds aspect ratio attribute to distinguish different 4k modes. According to Appendix E of HDMI 2.0 spec, source should use VSIF to indicate VIC mode only when the mode is one defined in HDMI 1.4b 4K modes. Otherwise, use AVI infoframes to convey VIC. eg: VIC_103 should use AVI infoframes and VIC_93 use VSIF When the sink is HDMI 2.0, current code in drm_hdmi_avi_infoframe_from_display_mode will also force mode VIC_103 to have VIC value 0. This violates the spec and needs to be corrected. The same situation occurs in drm_hdmi_vendor_infoframe_from_display_mode and should set HDMI_VIC when the mode is one defined in HDMI 1.4b 4K modes. --- drivers/gpu/drm/drm_edid.c | 95 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 92 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 649cfd8b4200..0fea9bf4ec67 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -1306,6 +1306,37 @@ static const struct drm_display_mode edid_4k_modes[] = { .vrefresh = 24, }, }; +/* + * 4k modes of HDMI 1.4 defined in HDMI 2.0. Index using the VIC. + */ +static const struct drm_display_mode hdmi_1_4_edid_4k_modes[] = { + /* 0 - dummy, VICs start at 1 */ + { }, + /* 1 - 3840x2160@30Hz */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, + 3840, 4016, 4104, 4400, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 2 - 3840x2160@25Hz */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, + 3840, 4896, 4984, 5280, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 3 - 3840x2160@24Hz */ + { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, + 3840, 5116, 5204, 5500, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + /* 4 - 4096x2160@24Hz (SMPTE) */ + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, + 4096, 5116, 5204, 5500, 0, + 2160, 2168, 2178, 2250, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, +}; /*** DDC fetch and block validation ***/ static const u8 edid_header[] = { @@ -3061,6 +3092,19 @@ hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) return cea_mode_alternate_clock(hdmi_mode); } +/* + * Calculate the alternate clock for HDMI modes (those from the HDMI vendor + * specific block). + * + * It's almost like hdmi_mode_alternate_clock(), but no exception for VIC 4 mode. + * There is an alternate clock (23.98Hz) of VIC 4 mode (4096x2160@24Hz) in HDMI 2.0 + */ +static unsigned int +hdmi_1_4_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) +{ + return cea_mode_alternate_clock(hdmi_mode); +} + static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match, unsigned int clock_tolerance) { @@ -3121,11 +3165,53 @@ static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match) return 0; } +/* + * drm_match_hdmi_1_4_mode - look for a HDMI 1.4 mode matching given mode + * @to_match: display mode + * + * An HDMI mode is one defined in the HDMI vendor specific block. + * In HDMI 2.0, only few 4k resolutions with specific aspect ratio should + * utilize H14b VSIF. + * + * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one. + */ +static u8 drm_match_hdmi_1_4_mode(const struct drm_display_mode *to_match) +{ + unsigned int match_flags = DRM_MODE_MATCH_TIMINGS | DRM_MODE_MATCH_FLAGS; + u8 vic; + + if (!to_match->clock) + return 0; + + if (to_match->picture_aspect_ratio) + match_flags |= DRM_MODE_MATCH_ASPECT_RATIO; + + for (vic = 1; vic < ARRAY_SIZE(hdmi_1_4_edid_4k_modes); vic++) { + const struct drm_display_mode *hdmi_1_4_mode = &hdmi_1_4_edid_4k_modes[vic]; + unsigned int clock1, clock2; + + /* Make sure to also match alternate clocks */ + clock1 = hdmi_1_4_mode->clock; + clock2 = hdmi_1_4_mode_alternate_clock(hdmi_1_4_mode); + + if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || + KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && + drm_mode_match(to_match, hdmi_1_4_mode, match_flags)) + return vic; + } + return 0; +} + static bool drm_valid_hdmi_vic(u8 vic) { return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes); } +static bool drm_valid_hdmi_1_4_vic(u8 vic) +{ + return vic > 0 && vic < ARRAY_SIZE(hdmi_1_4_edid_4k_modes); +} + static int add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) { @@ -4894,10 +4980,12 @@ drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, * HDMI 1.4b 4K modes */ if (frame->video_code) { - u8 vendor_if_vic = drm_match_hdmi_mode(mode); + u8 vendor_if_vic = is_hdmi2_sink(connector) ? + drm_match_hdmi_1_4_mode(mode) : drm_match_hdmi_mode(mode); bool is_s3d = mode->flags & DRM_MODE_FLAG_3D_MASK; - if (drm_valid_hdmi_vic(vendor_if_vic) && !is_s3d) + if (!is_s3d && is_hdmi2_sink(connector) ? + drm_valid_hdmi_1_4_vic(vendor_if_vic) : drm_valid_hdmi_vic(vendor_if_vic)) frame->video_code = 0; } @@ -5125,7 +5213,8 @@ drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, if (!has_hdmi_infoframe) return -EINVAL; - vic = drm_match_hdmi_mode(mode); + vic = is_hdmi2_sink(connector) ? + drm_match_hdmi_1_4_mode(mode) : drm_match_hdmi_mode(mode); s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK; /*