From patchwork Thu Oct 10 09:25:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 11182989 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 09BAB1575 for ; Thu, 10 Oct 2019 09:25:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E68182064A for ; Thu, 10 Oct 2019 09:25:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E68182064A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C169F6EAD1; Thu, 10 Oct 2019 09:25:36 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id D034A6EAD4 for ; Thu, 10 Oct 2019 09:25:35 +0000 (UTC) Received: by mail-wr1-x442.google.com with SMTP id h4so6950272wrv.7 for ; Thu, 10 Oct 2019 02:25:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NpGaBOGMKyAB4Ohuci7O2fHoJMWm7VBJJx757ititKU=; b=PyQGMfPZSvf1EU4hIMo52dCSnDhkG4sg45MMf5wrK2wuXZ6iEEFcu/eOAgIKT7++sp YopDoVF3VG0VzHtTAIsApuEozDQpCd1JPZP2bFJGyFBb0a12HMrvJd6XFFX4uyDnz6Qe /bjXm004lgnrcIGUamj9M22uHyRlvtqLREi9u15V4eSpFM2MTahj1zFtRWQUKmVHTlAP wwxbuphvRDncl2A99zPkwBMDdL1Fv//nGIzk122/ZALe5acNval8Fp1kg4ElWwoMEM2d scd4eBueRYNCGoOmvgAn18ifSR7dvyzSeKPNvdqTs+Duv3+JztKc/FRkotPOhk+BNfSM zSMQ== X-Gm-Message-State: APjAAAXBP/1Ah9cGtPioNTlgMfiHk6CJRHCmlLtjKywc8CIvIhacX93s 2j9X0dAAEkjdf3SGN+3LmFsBqJKd1hPJ0g== X-Google-Smtp-Source: APXvYqxaKkhImEXY4h60rg4IFjEADFfbAKFMUuKxjHR+5zY5ZvBAbCp70nq+WoLbJQMSeAcGi+9hlA== X-Received: by 2002:a5d:4302:: with SMTP id h2mr7975471wrq.35.1570699533163; Thu, 10 Oct 2019 02:25:33 -0700 (PDT) Received: from bender.baylibre.local (lmontsouris-657-1-212-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id s10sm8373770wmf.48.2019.10.10.02.25.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Oct 2019 02:25:32 -0700 (PDT) From: Neil Armstrong To: dri-devel@lists.freedesktop.org Subject: [PATCH 5/7] drm/meson: viu: add AFBC modules routing functions Date: Thu, 10 Oct 2019 11:25:24 +0200 Message-Id: <20191010092526.10419-6-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20191010092526.10419-1-narmstrong@baylibre.com> References: <20191010092526.10419-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NpGaBOGMKyAB4Ohuci7O2fHoJMWm7VBJJx757ititKU=; b=tRWbY5ZoCA+9rVsCN1XkCwCjVsFOPhvmVoh16VtJVAOYE/sexaVXoLRfYLAyXlonfg Z50hDQ9X6tqY6bvc9pze8s7SRg9xFlqxdD5HNYMgvtjOmfG1dLsg2TU429hMRVH00T2+ 4kvdteaNWKl63O1+DToVeaoZlBP1+Lq8+QUgFJQsl/1crFfqH+mhmln/ajwNu53sfbyk O1rf/i3Q5AerWgSj2Malofn8SbCdMNHa23ENAKdcR5aluhM7HUfnSeX8wEOZiZzAS3qB fq+DMW7xBJPsapQWhiBrF+QL/VYCOOvhDmv6oY6o8Y4j72WFWeCPLJTXVAMOVw9BhWHG EFNA== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: khilman@baylibre.com, linux-amlogic@lists.infradead.org, ayan.halder@arm.com, linux-arm-kernel@lists.infradead.org, Neil Armstrong Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Amlogic G12A AFBC Decoder pixel input need to be routed diferently than the Amlogic GXM AFBC decoder, this adds support for routing the VIU OSD1 pixel source to the AFBC "Mali Unpack" module. This "Mali Unpack" module is also configured with a static RGBA mapping for now until we support more pixel formats. Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_viu.c | 52 +++++++++++++++++++++++++++++++ drivers/gpu/drm/meson/meson_viu.h | 4 +++ 2 files changed, 56 insertions(+) diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c index 68cf2c2eca5f..cdd4962484db 100644 --- a/drivers/gpu/drm/meson/meson_viu.c +++ b/drivers/gpu/drm/meson/meson_viu.c @@ -7,6 +7,7 @@ */ #include +#include #include "meson_drv.h" #include "meson_viu.h" @@ -335,6 +336,57 @@ void meson_viu_osd1_reset(struct meson_drm *priv) meson_viu_load_matrix(priv); } +void meson_viu_g12a_enable_osd1_afbc(struct meson_drm *priv) +{ + /* Enable Mali AFBC Unpack */ + writel_bits_relaxed(VIU_OSD1_MALI_UNPACK_EN, + VIU_OSD1_MALI_UNPACK_EN, + priv->io_base + _REG(VIU_OSD1_MALI_UNPACK_CTRL)); + + /* Setup RGBA Reordering */ + writel_bits_relaxed(VIU_OSD1_MALI_AFBCD_A_REORDER | + VIU_OSD1_MALI_AFBCD_B_REORDER | + VIU_OSD1_MALI_AFBCD_G_REORDER | + VIU_OSD1_MALI_AFBCD_R_REORDER, + FIELD_PREP(VIU_OSD1_MALI_AFBCD_A_REORDER, + VIU_OSD1_MALI_REORDER_A) | + FIELD_PREP(VIU_OSD1_MALI_AFBCD_B_REORDER, + VIU_OSD1_MALI_REORDER_B) | + FIELD_PREP(VIU_OSD1_MALI_AFBCD_G_REORDER, + VIU_OSD1_MALI_REORDER_G) | + FIELD_PREP(VIU_OSD1_MALI_AFBCD_R_REORDER, + VIU_OSD1_MALI_REORDER_R), + priv->io_base + _REG(VIU_OSD1_MALI_UNPACK_CTRL)); + + /* Select AFBCD path for OSD1 */ + writel_bits_relaxed(OSD_PATH_OSD_AXI_SEL_OSD1_AFBCD, + OSD_PATH_OSD_AXI_SEL_OSD1_AFBCD, + priv->io_base + _REG(OSD_PATH_MISC_CTRL)); +} + +void meson_viu_g12a_disable_osd1_afbc(struct meson_drm *priv) +{ + /* Disable AFBCD path for OSD1 */ + writel_bits_relaxed(OSD_PATH_OSD_AXI_SEL_OSD1_AFBCD, 0, + priv->io_base + _REG(OSD_PATH_MISC_CTRL)); + + /* Disable AFBCD unpack */ + writel_bits_relaxed(VIU_OSD1_MALI_UNPACK_EN, 0, + priv->io_base + _REG(VIU_OSD1_MALI_UNPACK_CTRL)); +} + +void meson_viu_gxm_enable_osd1_afbc(struct meson_drm *priv) +{ + writel_bits_relaxed(MALI_AFBC_MISC, FIELD_PREP(MALI_AFBC_MISC, 0x90), + priv->io_base + _REG(VIU_MISC_CTRL1)); +} + +void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv) +{ + writel_bits_relaxed(MALI_AFBC_MISC, FIELD_PREP(MALI_AFBC_MISC, 0x00), + priv->io_base + _REG(VIU_MISC_CTRL1)); +} + static inline uint32_t meson_viu_osd_burst_length_reg(uint32_t length) { uint32_t val = (((length & 0x80) % 24) / 12); diff --git a/drivers/gpu/drm/meson/meson_viu.h b/drivers/gpu/drm/meson/meson_viu.h index e297772d967f..e4a2f24d7c38 100644 --- a/drivers/gpu/drm/meson/meson_viu.h +++ b/drivers/gpu/drm/meson/meson_viu.h @@ -63,6 +63,10 @@ #define OSD_PENDING_STAT_CLEAN BIT(1) void meson_viu_osd1_reset(struct meson_drm *priv); +void meson_viu_g12a_enable_osd1_afbc(struct meson_drm *priv); +void meson_viu_g12a_disable_osd1_afbc(struct meson_drm *priv); +void meson_viu_gxm_enable_osd1_afbc(struct meson_drm *priv); +void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv); void meson_viu_init(struct meson_drm *priv); #endif /* __MESON_VIU_H */