From patchwork Tue Oct 22 09:59:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 11204117 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 709EF1895 for ; Tue, 22 Oct 2019 10:01:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 58AEB214B2 for ; Tue, 22 Oct 2019 10:01:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 58AEB214B2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B2E16E51C; Tue, 22 Oct 2019 10:01:26 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id ABAAF6E513; Tue, 22 Oct 2019 10:01:20 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Oct 2019 03:01:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,326,1566889200"; d="scan'208";a="196388717" Received: from sharmash-desk1.iind.intel.com ([10.99.66.206]) by fmsmga008.fm.intel.com with ESMTP; 22 Oct 2019 03:01:18 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 2/3] drm/i915: Add support for scaling filters Date: Tue, 22 Oct 2019 15:29:45 +0530 Message-Id: <20191022095946.29354-3-shashank.sharma@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191022095946.29354-1-shashank.sharma@intel.com> References: <20191022095946.29354-1-shashank.sharma@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch does the following: - Creates the CRTC property for scaling filter mode (for GEN11 and +). - Applies the chosen filter value while enabling the panel fitter. - Adds CRTC state readouts and comparisons. Signed-off-by: Shashank Sharma --- drivers/gpu/drm/i915/display/intel_display.c | 59 +++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1a533ccdb54f..21993f9fd2ae 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5615,11 +5615,35 @@ static void skylake_scaler_disable(struct intel_crtc *crtc) skl_detach_scaler(crtc, i); } +static u32 +icelake_get_scaler_filter(const struct intel_crtc_state *crtc_state) +{ + const struct drm_crtc_state *state = &crtc_state->base; + + switch (state->scaling_filter) { + case DRM_SCALING_FILTER_BILINEAR: + return PS_FILTER_BILINEAR; + case DRM_SCALING_FILTER_EDGE_ENHANCE: + return PS_FILTER_EDGE_ENHANCE; + case DRM_SCALING_FILTER_NN: + case DRM_SCALING_FILTER_NN_IS_ONLY: + return PS_FILTER_PROGRAMMED; + case DRM_SCALING_FILTER_INVALID: + DRM_ERROR("Ignoring invalid scaler filter mode\n"); + return PS_FILTER_MEDIUM; + case DRM_SCALING_FILTER_DEFAULT: + case DRM_SCALING_FILTER_MEDIUM: + default: + return PS_FILTER_MEDIUM; + } +} + static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; + u32 scaler_filter; const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; @@ -5640,9 +5664,11 @@ static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state) uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false); uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false); + scaler_filter = icelake_get_scaler_filter(crtc_state); + id = scaler_state->scaler_id; I915_WRITE(SKL_PS_CTRL(pipe, id), PS_SCALER_EN | - PS_FILTER_MEDIUM | scaler_state->scalers[id].mode); + scaler_filter | scaler_state->scalers[id].mode); I915_WRITE_FW(SKL_PS_VPHASE(pipe, id), PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase)); I915_WRITE_FW(SKL_PS_HPHASE(pipe, id), @@ -12192,6 +12218,10 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, pipe_config->scaler_state.scaler_users, pipe_config->scaler_state.scaler_id); + if (INTEL_GEN(dev_priv) >= 11) + DRM_DEBUG_KMS("scaling_filter: %d\n", + pipe_config->base.scaling_filter); + if (HAS_GMCH(dev_priv)) DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n", pipe_config->gmch_pfit.control, @@ -12858,6 +12888,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, } PIPE_CONF_CHECK_I(scaler_state.scaler_id); + PIPE_CONF_CHECK_I(base.scaling_filter); PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate); PIPE_CONF_CHECK_X(gamma_mode); @@ -14996,6 +15027,29 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv, return ERR_PTR(ret); } +static void icl_create_scaler_filter_property(struct intel_crtc *crtc, + struct intel_crtc_state *crtc_state) +{ + struct drm_property *prop; + struct drm_device *dev = crtc->base.dev; + struct drm_mode_config *mode_config = &dev->mode_config; + u8 size; + + if (mode_config->scaling_filter_property) + return; + + size = ARRAY_SIZE(drm_scaling_filter_enum_list); + prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE, + "SCALING_FILTERS", + drm_scaling_filter_enum_list, size); + if (!prop) { + DRM_ERROR("Failed to create scaling filter property\n"); + return; + } + + dev->mode_config.scaling_filter_property = prop; +} + static void intel_crtc_init_scalers(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state) { @@ -15016,6 +15070,9 @@ static void intel_crtc_init_scalers(struct intel_crtc *crtc, } scaler_state->scaler_id = -1; + + if (INTEL_GEN(dev_priv) >= 11) + icl_create_scaler_filter_property(crtc, crtc_state); } #define INTEL_CRTC_FUNCS \