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Sat, 16 Nov 2019 16:01:40 -0600 From: To: Subject: [PATCH v7 17/17] drm/amd/display: Trigger modesets on MST DSC connectors Date: Sat, 16 Nov 2019 17:01:28 -0500 Message-ID: <20191116220128.16598-18-mikita.lipski@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191116220128.16598-1-mikita.lipski@amd.com> References: <20191116220128.16598-1-mikita.lipski@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(376002)(136003)(396003)(346002)(39850400004)(428003)(199004)(189003)(316002)(70206006)(6666004)(86362001)(16586007)(70586007)(53416004)(1076003)(356004)(2351001)(50466002)(54906003)(48376002)(8936002)(47776003)(50226002)(26005)(2876002)(51416003)(7696005)(8676002)(81156014)(81166006)(2906002)(6916009)(4326008)(76176011)(11346002)(446003)(126002)(476003)(486006)(426003)(2616005)(186003)(336012)(5660300002)(305945005)(478600001)(14444005)(5024004)(36756003)(16060500001); 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Ip=[165.204.84.17]; Helo=[SATLEXMB02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1309 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=XSe6QhjM4OOxgAJ1sss9YFh01sTUeLZmXY/Bdgz3MV4=; b=BjM9jl2C/D/Gu058dgVkHxRyEUdhLryjdehxXoMjA7bzk+a8cS3fj7OCU8tjEQckNeGrjGXvdSW0/a92Ml5LdiQjzizbng5WeknwqtyxbRAkBg4G89mshVd9N2rhhX5NQrBOrNcJaF3cpx4SB8jTrjPVl9iJW94ZCaX81hgTwBc= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Francis , Mikita Lipski , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Mikita Lipski Whenever a connector on an MST network is attached, detached, or undergoes a modeset, the DSC configs for each stream on that topology will be recalculated. This can change their required bandwidth, requiring a full reprogramming, as though a modeset was performed, even if that stream did not change timing. Therefore, whenever a crtc has drm_atomic_crtc_needs_modeset, for each crtc that shares a MST topology with that stream and supports DSC, add that crtc (and all affected connectors and planes) to the atomic state and set mode_changed on its state v2: Do this check only on Navi and before adding connectors and planes on modesetting crtcs Signed-off-by: David Francis Signed-off-by: Mikita Lipski --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 4be6621088d2..2dc5c27ee4a1 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -7924,6 +7924,29 @@ dm_determine_update_type_for_commit(struct amdgpu_display_manager *dm, *out_type = update_type; return ret; } +static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm_crtc *crtc) +{ + struct drm_connector *connector; + struct drm_connector_state *conn_state; + struct amdgpu_dm_connector *aconnector = NULL; + int i; + for_each_new_connector_in_state(state, connector, conn_state, i) { + if (conn_state->crtc != crtc) + continue; + + aconnector = to_amdgpu_dm_connector(connector); + if (!aconnector->port) + aconnector = NULL; + else + break; + } + + if (!aconnector) + return 0; + + return drm_dp_mst_add_affected_dsc_crtcs(state, aconnector->port); + +} /** * amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM. @@ -7976,6 +7999,16 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, ret = drm_atomic_helper_check_modeset(dev, state); if (ret) goto fail; + + if (adev->asic_type >= CHIP_NAVI10) { + for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { + if (drm_atomic_crtc_needs_modeset(new_crtc_state)) { + ret = add_affected_mst_dsc_crtcs(state, crtc); + if (ret) + goto fail; + } + } + } for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&