From patchwork Sat Nov 16 22:01:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lipski, Mikita" X-Patchwork-Id: 11247741 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 44C5D13B2 for ; Sat, 16 Nov 2019 22:01:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2BFF52071E for ; Sat, 16 Nov 2019 22:01:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2BFF52071E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amd.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2474D6E1CF; Sat, 16 Nov 2019 22:01:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-eopbgr770054.outbound.protection.outlook.com [40.107.77.54]) by gabe.freedesktop.org (Postfix) with ESMTPS id B2AED6E1BD; Sat, 16 Nov 2019 22:01:38 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=KtkHysBTBArJ/9vWfJak8mflHhI4hUixwZEaxyItDfHXTGeBUdBlc5h0SLWN4iVpEhaR9Cy772Om8x4f+m8BcVnFWhlGQpio2RZyng4Ge65jItwRWdIdXv+TykLs4cpfZwoY7rYOccpL/hwAdf9i1HTip5CJit5uMV3rWRHw5ZdNcp2n0wNvPVvuU+Sb3VQ+E6z3s7n1BJWkSoYOnU8z2bVf/Nm1pKlkbypZXOqRPWxlOSI7SukXTX1BHf2au33sb39tDTtuk5exmbOrpl+gkTMevrvTe3GYYXWQErNT/NtyJWOwLY1+NEunxJTEDTAu8tiCv+PhyQzBLnJLyBoIug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hhyu6ucrpwDlhDNuB8ojWZbs0B3vNStfmLx4LwN9Hkk=; b=VWSr6Q2zzzRBNGVu1+aYB0zgsH9PZJvsTS9YnilLTn9DuIoiQ5XBL4oLfbYVoOz5XkTeT1dUYpAepnf5DqVX3BCHztRnDl0nsa3Cq1VrQrGoB/vjPqQcGabl4ZZkfRkdgMWP3gdO0x0ruQab5rTFJH/cYdpDEAaWCQ/fLMY38kqM0noOePRUb1sB6JviJ0JFNifzG3b3RsviuxEBjacXnN3Ooeq2Y+EcMBaLroPFFtMS6v84KJ0oPH2KZ02s2AmtPKNBXl3FJoL5QIJLVCXuTPz1Wz3EsdY82TLqj4tIyhJrOwsVVZm334CRQzlt0Z/hLF/n+NwVJiyvCjaZi9Gd3Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.freedesktop.org smtp.mailfrom=amd.com; dmarc=permerror action=none header.from=amd.com; dkim=none (message not signed); arc=none Received: from CY4PR12CA0031.namprd12.prod.outlook.com (2603:10b6:903:129::17) by DM5PR12MB1817.namprd12.prod.outlook.com (2603:10b6:3:109::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2451.23; Sat, 16 Nov 2019 22:01:34 +0000 Received: from CO1NAM11FT019.eop-nam11.prod.protection.outlook.com (2a01:111:f400:7eab::200) by CY4PR12CA0031.outlook.office365.com (2603:10b6:903:129::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2451.28 via Frontend Transport; Sat, 16 Nov 2019 22:01:33 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXMB01.amd.com (165.204.84.17) by CO1NAM11FT019.mail.protection.outlook.com (10.13.175.57) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.2451.23 via Frontend Transport; Sat, 16 Nov 2019 22:01:32 +0000 Received: from SATLEXMB05.amd.com (10.181.40.146) by SATLEXMB01.amd.com (10.181.40.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Sat, 16 Nov 2019 16:01:31 -0600 Received: from SATLEXMB01.amd.com (10.181.40.142) by SATLEXMB05.amd.com (10.181.40.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Sat, 16 Nov 2019 16:01:31 -0600 Received: from mlipski-pc.amd.com (10.180.168.240) by SATLEXMB01.amd.com (10.181.40.142) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Sat, 16 Nov 2019 16:01:31 -0600 From: To: Subject: [PATCH v7 01/17] drm/dp_mst: Add PBN calculation for DSC modes Date: Sat, 16 Nov 2019 17:01:12 -0500 Message-ID: <20191116220128.16598-2-mikita.lipski@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191116220128.16598-1-mikita.lipski@amd.com> References: <20191116220128.16598-1-mikita.lipski@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(346002)(396003)(39860400002)(136003)(376002)(428003)(199004)(189003)(4326008)(76176011)(486006)(476003)(126002)(2616005)(186003)(446003)(11346002)(426003)(6916009)(5660300002)(305945005)(36756003)(478600001)(336012)(356004)(50466002)(48376002)(2351001)(70586007)(54906003)(70206006)(316002)(86362001)(6666004)(16586007)(53416004)(50226002)(2876002)(8936002)(47776003)(7696005)(51416003)(8676002)(2906002)(81166006)(81156014)(1076003)(26005)(16060500001); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1817; H:SATLEXMB01.amd.com; FPR:; SPF:None; LANG:en; PTR:InfoDomainNonexistent; A:1; MX:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c8765b47-8704-4c73-5385-08d76ae08ab7 X-MS-TrafficTypeDiagnostic: DM5PR12MB1817: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-Forefront-PRVS: 02234DBFF6 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EFED6nWoMR/i7v/gFpAgMtaP3h6FqnhJWY4rD6o9WimPg8l5gbSYvUkPSm7lQZMo3JrOYWlYwvBxJJ/WbRGP9hHnqexO3I5lXMwJuzRxNMRTjYeib6zEAmfqKAS3+nNik10mjLgSdW9KCCxzVVFbmt5O6vR/J1oWpY1xb7N5yUGRSBnWV/91vSjyHUPXJjAqJ2QYC3o2NWbL3tYyLTp2r2tOxRzIi16clW3enpi6s6CTtPVcAkwPSAWVbMbRCu+dy0tdrzwDht4BsWtDtrgziPxWqdh2rmdK4oHpVXjXVxq0UrOMeEhGUb8/2k9M3OF7s+wsem9YAe3rCgDkep0nVdw3xsazq8GjetoVSw5qQ3tA/8LfCyMbeEcaJR5dLinEzjdXF9gZQXImSbxlES4H9O20viPBPD1uHLHIsYNWc28zUxJ7PT5+1DO3KubtLPK9 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Nov 2019 22:01:32.7116 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c8765b47-8704-4c73-5385-08d76ae08ab7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1817 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hhyu6ucrpwDlhDNuB8ojWZbs0B3vNStfmLx4LwN9Hkk=; b=wXH5VnGq4TqcaQwnwoK9w7eBsJpN0NnBbor0W//1kbqDQZ1sIaBxqAac/o1xf9cDDRr7l/Zyv2500Rvi+1fswR/Hr1ove/S7nnE1mugijcbC7pJQfHEs8mhP/p+nM70bx0dUp9AZUtBvAbvXQsMNqGQi+xCPCupnPI2WaPhh1Qk= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Francis , Mikita Lipski , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: David Francis With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this Reviewed-by: Manasi Navare Reviewed-by: Lyude Paul Reviewed-by: Harry Wentland Signed-off-by: David Francis Signed-off-by: Mikita Lipski --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- drivers/gpu/drm/drm_dp_mst_topology.c | 16 ++++++++++++---- drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 ++- drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 ++- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- include/drm/drm_dp_mst_helper.h | 3 +-- 6 files changed, 19 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 93fa3f1d2e7e..6c32b73c5197 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -4967,7 +4967,7 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder, is_y420); bpp = convert_dc_color_depth_into_bpc(color_depth) * 3; clock = adjusted_mode->clock; - dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp); + dm_new_connector_state->pbn = drm_dp_calc_pbn_mode(clock, bpp, false); } dm_new_connector_state->vcpi_slots = drm_dp_atomic_find_vcpi_slots(state, mst_mgr, diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index 82add736e17d..3e7b7553cf4d 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -3534,10 +3534,11 @@ EXPORT_SYMBOL(drm_dp_check_act_status); * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode. * @clock: dot clock for the mode * @bpp: bpp for the mode. + * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel * * This uses the formula in the spec to calculate the PBN value for a mode. */ -int drm_dp_calc_pbn_mode(int clock, int bpp) +int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc) { u64 kbps; s64 peak_kbps; @@ -3555,11 +3556,18 @@ int drm_dp_calc_pbn_mode(int clock, int bpp) * peak_kbps *= (1006/1000) * peak_kbps *= (64/54) * peak_kbps *= 8 convert to bytes + * + * If the bpp is in units of 1/16, further divide by 16. Put this + * factor in the numerator rather than the denominator to avoid + * integer overflow */ numerator = 64 * 1006; denominator = 54 * 8 * 1000 * 1000; + if (dsc) + numerator /= 16; + kbps *= numerator; peak_kbps = drm_fixp_from_fraction(kbps, denominator); @@ -3570,19 +3578,19 @@ EXPORT_SYMBOL(drm_dp_calc_pbn_mode); static int test_calc_pbn_mode(void) { int ret; - ret = drm_dp_calc_pbn_mode(154000, 30); + ret = drm_dp_calc_pbn_mode(154000, 30, false); if (ret != 689) { DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", 154000, 30, 689, ret); return -EINVAL; } - ret = drm_dp_calc_pbn_mode(234000, 30); + ret = drm_dp_calc_pbn_mode(234000, 30, false); if (ret != 1047) { DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", 234000, 30, 1047, ret); return -EINVAL; } - ret = drm_dp_calc_pbn_mode(297000, 24); + ret = drm_dp_calc_pbn_mode(297000, 24, false); if (ret != 1063) { DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n", 297000, 24, 1063, ret); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 2c5ac3dd647f..dfac450841df 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -61,7 +61,8 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, crtc_state->pipe_bpp = bpp; crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, - crtc_state->pipe_bpp); + crtc_state->pipe_bpp, + false); slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, port, crtc_state->pbn); diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index f1dbc7852414..c45832230ccc 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -778,7 +778,8 @@ nv50_msto_atomic_check(struct drm_encoder *encoder, if (!state->duplicated) asyh->dp.pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock, - connector->display_info.bpc * 3); + connector->display_info.bpc * 3, + false); if (crtc_state->mode_changed) { slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr, diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c index 2994f07fbad9..c997f88218f2 100644 --- a/drivers/gpu/drm/radeon/radeon_dp_mst.c +++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c @@ -514,7 +514,7 @@ static bool radeon_mst_mode_fixup(struct drm_encoder *encoder, mst_enc = radeon_encoder->enc_priv; - mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); + mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false); mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices; DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 2ba6253ea6d3..9116b2c95239 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -610,8 +610,7 @@ bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr, struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port); -int drm_dp_calc_pbn_mode(int clock, int bpp); - +int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc); bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn, int slots);