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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id j23sm9166942lji.41.2019.11.18.12.05.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2019 12:05:40 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Mikko Perttunen , Georgi Djakov , Rob Herring Subject: [PATCH v1 10/29] ARM: tegra: Add interconnect properties to Tegra30 device-tree Date: Mon, 18 Nov 2019 23:02:28 +0300 Message-Id: <20191118200247.3567-11-digetx@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191118200247.3567-1-digetx@gmail.com> References: <20191118200247.3567-1-digetx@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 19 Nov 2019 08:04:07 +0000 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3B7+0SNFIwKYfZnWg59M6CobeLtFL0LQksvAiCdlsLo=; b=GvfAMBwjwdcJwcfQkg3EYPixn7Fn9xRg5dcSxz41GPIA2pK3Lsv7ue0FOHHWASXzbR c8HdPA2WivTVy97ItI39CUEvrHkYTM2BFLLyihqmmzzYjmW7+8PNBFZpf8e5YJ33+QNj pg84s/xcDSukyKnuAui1kYlt6oAvk8L2dRImj4FI1leqMK91gJSnKs3urCrms5d6GrbD OnBPvMLZP8Hk5f50CVL3KPjPFnsEv+sL9Qc8Dr28XcoHvwEZFlclJr34gcg+fX2PoDCY /caJfWEf3TlFkSFovaSf7dqk9AZkEPVI4yVSiTdaCJxtGhJDZv2Fk6rWTCV8AAUkPLif a1ag== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add interconnect properties to the memory controller, external memory controller and the display controller nodes to describe interconnection of these nodes. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra30.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 55ae050042ce..69a239f1a823 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include #include / { @@ -207,6 +208,9 @@ nvidia,head = <0>; + interconnects = <&mc TEGRA_ICC_MC_DC &emc TEGRA_ICC_EMEM>; + interconnect-names = "dma-mem"; + rgb { status = "disabled"; }; @@ -226,6 +230,9 @@ nvidia,head = <1>; + interconnects = <&mc TEGRA_ICC_MC_DCB &emc TEGRA_ICC_EMEM>; + interconnect-names = "dma-mem"; + rgb { status = "disabled"; }; @@ -731,15 +738,18 @@ #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; }; - memory-controller@7000f400 { + emc: memory-controller@7000f400 { compatible = "nvidia,tegra30-emc"; reg = <0x7000f400 0x400>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_EMC>; nvidia,memory-controller = <&mc>; + + #interconnect-cells = <1>; }; fuse@7000f800 {