From patchwork Mon Dec 2 21:47:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Anderson X-Patchwork-Id: 11270771 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C645B14B7 for ; Tue, 3 Dec 2019 08:05:22 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA26E205ED for ; Tue, 3 Dec 2019 08:05:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AA26E205ED Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BFC66E3EE; Tue, 3 Dec 2019 08:05:19 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by gabe.freedesktop.org (Postfix) with ESMTPS id BA9966E0FD for ; Mon, 2 Dec 2019 21:47:18 +0000 (UTC) Received: by mail-pf1-x44a.google.com with SMTP id h67so706514pfb.7 for ; Mon, 02 Dec 2019 13:47:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=tv65YlSAEZ1AZ+C4f4YFmN8tMU2gW3K2G0SFIfpGo5w=; b=CYUyVEH8O4FK16pE44gCPER3IehpL5MXpY9FgOlUEE+KfFmavsM1vzVt7JUq+sAPWE 2kiJG9AkEj20MnVNDUrL9FO3CHWY5W3rhAUDAhrMqAfZdxPceZJ115WUbBuyBhwEuqaJ AwNbcJREXSRUgGtB3S2w9DyDzGO1dm9Nec8DWy0CAAOEctFIXj1wdTKcN1kfodFi403Y Q1lnOY9oIZL+varIADafvfcwD7yVNqP2utrj/8tT7ft8a/QwlmpHkRkwX9EaRFkwYd7n iGNcqMYufdrlrR2wDI9KpebZ9okK1Q77oa3roCwNsdgcwBgcnwgNPcYaYRSRFxY6iNAp DAeQ== X-Gm-Message-State: APjAAAWBrtKHhetlBuitScWFz6NPQjzM/rw5m3bh/ocC7oe76l40SHWf MTDkwUq1Dc5/sBmAh7VHoYQQjmYbN07+1abt1rUEgQ== X-Google-Smtp-Source: APXvYqxjercgrhFvw26C7tu67vRuvMwVkhb7I8GvZqDMrQzPa9NbsLse2rcZx9gOQDCneeLM95WwPRQFSasGSNTrSvEx5Q== X-Received: by 2002:a63:d66:: with SMTP id 38mr1323627pgn.233.1575323238172; Mon, 02 Dec 2019 13:47:18 -0800 (PST) Date: Mon, 2 Dec 2019 13:47:13 -0800 Message-Id: <20191202214713.41001-1-thomasanderson@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.24.0.393.g34dc348eaf-goog Subject: [PATCH v2] drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded From: Thomas Anderson To: Harry Wentland , Leo Li , Mikita Lipski , Alex Deucher X-Mailman-Approved-At: Tue, 03 Dec 2019 08:05:18 +0000 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:message-id:mime-version:subject:from:to:cc; bh=tv65YlSAEZ1AZ+C4f4YFmN8tMU2gW3K2G0SFIfpGo5w=; b=tE/RcnU/Tvs1iYlFu2Unv7wP+KcRQ91eUfJ3vfGXaR5pAdi8cPvE8FOFEVSckFR72q znSv5yLFeZxCGbacYocTlBH/DXMQA181wWTKbDu/39cT0ezfhb/VEHLPSfx4zvQYc5Ts +aKEQVn/mw/ntsiSVaiueR3CFPuhwpx7eJlG5V3Vp/Uscvc5PkrDEGOz+VTWlfKOdfLj hvyY9TJzTmD8YnhbFE2xKTS8TOpfNCzS0VUUnFzHL1hlVQIFQ/Gd/wu6Ev6QkfpJNwfc MRKIC9UZDmqe2rfEvF5lh4C3nH3mTgNyIKOs3yx5NWAY6zKtU01v3wzxtKLoCfx5/JMf rNUQ== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Anderson , David Airlie , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, Nicholas Kazlauskas , dri-devel@lists.freedesktop.org, =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For high-res (8K) or HFR (4K120) displays, using uncompressed pixel formats like YCbCr444 would exceed the bandwidth of HDMI 2.0, so the "interesting" modes would be disabled, leaving only low-res or low framerate modes. This change lowers the pixel encoding to 4:2:2 or 4:2:0 if the max TMDS clock is exceeded. Verified that 8K30 and 4K120 are now available and working with a Samsung Q900R over an HDMI 2.0b link from a Radeon 5700. Signed-off-by: Thomas Anderson Reviewed-by: Harry Wentland --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 45 ++++++++++--------- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 7aac9568d3be..803e59d97411 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3356,27 +3356,21 @@ get_output_color_space(const struct dc_crtc_timing *dc_crtc_timing) return color_space; } -static void reduce_mode_colour_depth(struct dc_crtc_timing *timing_out) -{ - if (timing_out->display_color_depth <= COLOR_DEPTH_888) - return; - - timing_out->display_color_depth--; -} - -static void adjust_colour_depth_from_display_info(struct dc_crtc_timing *timing_out, - const struct drm_display_info *info) +static bool adjust_colour_depth_from_display_info( + struct dc_crtc_timing *timing_out, + const struct drm_display_info *info) { + enum dc_color_depth depth = timing_out->display_color_depth; int normalized_clk; - if (timing_out->display_color_depth <= COLOR_DEPTH_888) - return; do { normalized_clk = timing_out->pix_clk_100hz / 10; /* YCbCr 4:2:0 requires additional adjustment of 1/2 */ if (timing_out->pixel_encoding == PIXEL_ENCODING_YCBCR420) normalized_clk /= 2; /* Adjusting pix clock following on HDMI spec based on colour depth */ - switch (timing_out->display_color_depth) { + switch (depth) { + case COLOR_DEPTH_888: + break; case COLOR_DEPTH_101010: normalized_clk = (normalized_clk * 30) / 24; break; @@ -3387,14 +3381,15 @@ static void adjust_colour_depth_from_display_info(struct dc_crtc_timing *timing_ normalized_clk = (normalized_clk * 48) / 24; break; default: - return; + /* The above depths are the only ones valid for HDMI. */ + return false; } - if (normalized_clk <= info->max_tmds_clock) - return; - reduce_mode_colour_depth(timing_out); - - } while (timing_out->display_color_depth > COLOR_DEPTH_888); - + if (normalized_clk <= info->max_tmds_clock) { + timing_out->display_color_depth = depth; + return true; + } + } while (--depth > COLOR_DEPTH_666); + return false; } static void fill_stream_properties_from_drm_display_mode( @@ -3474,8 +3469,14 @@ static void fill_stream_properties_from_drm_display_mode( stream->out_transfer_func->type = TF_TYPE_PREDEFINED; stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB; - if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) - adjust_colour_depth_from_display_info(timing_out, info); + if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) { + if (!adjust_colour_depth_from_display_info(timing_out, info) && + drm_mode_is_420_also(info, mode_in) && + timing_out->pixel_encoding != PIXEL_ENCODING_YCBCR420) { + timing_out->pixel_encoding = PIXEL_ENCODING_YCBCR420; + adjust_colour_depth_from_display_info(timing_out, info); + } + } } static void fill_audio_info(struct audio_info *audio_info,