@@ -531,6 +531,25 @@ void drm_dp_downstream_debug(struct seq_file *m,
if (bpc > 0)
seq_printf(m, "\t\tMax bpc: %d\n", bpc);
+
+ if (type == DP_DS_PORT_TYPE_HDMI) {
+ bool ycbcr422_passthru = port_cap[3] &
+ DP_DS_YCBCR422_PASSTHRU_SUPPORT;
+ bool ycbcr420_passthru = port_cap[3] &
+ DP_DS_YCBCR420_PASSTHRU_SUPPORT;
+ bool ycbcr422_convert = port_cap[3] &
+ DP_DS_CONV_YCBCR444_TO_YCBCR422_SUPPORT;
+ bool ycbcr420_convert = port_cap[3] &
+ DP_DS_CONV_YCBCR444_TO_YCBCR420_SUPPORT;
+ seq_printf(m, "\t\tHDMI YCbCr 4:2:2 pass-through support: %s\n",
+ ycbcr422_passthru ? "yes" : "no");
+ seq_printf(m, "\t\tHDMI YCbCr 4:2:0 pass-through support: %s\n",
+ ycbcr420_passthru ? "yes" : "no");
+ seq_printf(m, "\t\tHDMI YCbCr 4:4:4 to YCbCr 4:2:2 Convert support: %s\n",
+ ycbcr422_convert ? "yes" : "no");
+ seq_printf(m, "\t\tHDMI YCbCr 4:4:4 to YCbCr 4:2:0 Convert support: %s\n",
+ ycbcr420_convert ? "yes" : "no");
+ }
}
}
EXPORT_SYMBOL(drm_dp_downstream_debug);
@@ -391,6 +391,11 @@
# define DP_DS_10BPC 1
# define DP_DS_12BPC 2
# define DP_DS_16BPC 3
+/* offset 3 for HDMI */
+# define DP_DS_YCBCR422_PASSTHRU_SUPPORT (1 << 1) /* 1.4 */
+# define DP_DS_YCBCR420_PASSTHRU_SUPPORT (1 << 2)
+# define DP_DS_CONV_YCBCR444_TO_YCBCR422_SUPPORT (1 << 3)
+# define DP_DS_CONV_YCBCR444_TO_YCBCR420_SUPPORT (1 << 4)
#define DP_MAX_DOWNSTREAM_PORTS 0x10
When DP downstream has HDMI branch, it checks below functionality and shows supports. It follows DP 1.4a spec; Table 2-161: Address Mapping within DPCD Receiver Capability Field (DPCD Addresses 00000h through 000FFh). Added flags for DP downstream: YCBCR422_PASS_THROUGH_SUPPORT, YCBCR420_PASS_THROUGH_SUPPORT, CONVERSION_FROM_YCBCR444_TO_YCBCR422_SUPPORT and CONVERSION_FROM_YCBCR444_TO_YCBCR420_SUPPORT. Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 19 +++++++++++++++++++ include/drm/drm_dp_helper.h | 5 +++++ 2 files changed, 24 insertions(+)