From patchwork Wed Feb 19 13:53:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 11391801 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E9A50139A for ; Wed, 19 Feb 2020 16:18:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C4C102067D for ; Wed, 19 Feb 2020 16:18:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FDhB5dAD" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C4C102067D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A30AA6EC4C; Wed, 19 Feb 2020 16:18:38 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x442.google.com (mail-wr1-x442.google.com [IPv6:2a00:1450:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id 522F26EBF7; Wed, 19 Feb 2020 13:50:51 +0000 (UTC) Received: by mail-wr1-x442.google.com with SMTP id w15so637184wru.4; Wed, 19 Feb 2020 05:50:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=n5R88FGnPjhsQadJtsU+Gi9+2LMayu3HLn44l5p9s88=; b=FDhB5dADnQpunlTNlf9946ku9SoWZXYYB2CeG8BOhSVd5ozLn2wLlmKkHn7TmGhrLy H3xKrxmVhew9ySyFu5cqVCV0Ft7fxr8yiw1mnfaFiuVHirV7+NuOjy8CIgQjZxBqGlQu 7Iz9FweJ+NZWPeuvZUMZCM/igpx4shxXyMH+qMyF3w2UWZxtg92+KdSR6TEd56zaC21w xKDAP4xu9Z5LHwmmWjZ+hm57Hkscgm6u/c4+Vwka0ytKeJtiBy3ACcTjY3/84hF6KW76 1Feqo2Soc0AmLFhZbSBLCIEKWePRLekTB0Cp7R90q1l81GKnY6M/A7lzmmhB2nYGpYTa 4ScQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=n5R88FGnPjhsQadJtsU+Gi9+2LMayu3HLn44l5p9s88=; b=WvkgpxL6WnOPEQ0hZHaRKXyUxDzhj+lGMAdOnJa9gbE1MgS8wK/vRYWHVdiSypmEcx jDvKXq3om6xs0HsPB3+aozPQuy6C5rDkLlW6mcJV2r+x0/Wa48VlIGv/kC9eDlJxNpaz 1jZdV85olRqiZ9eF+dpn7IbzUwv+G+d6HQKYEtSwjbn2I2ejjHTwmSdTx5daQ+GIxYZT WRIFgbyGsQWY0qFMOYqX1L6XjVcM00/NvTl0ngbhLy27JX4mp0Sjgug2pukAAhRMqZCM fOIYF7C5keeivGfh2Y8617FbnX94PDVG2LtpULW72PfP5NkP7InRFhF5QTb6gXtpgkuR ALMQ== X-Gm-Message-State: APjAAAX6s8/pSACXEsTNhgy3SYBBnIF8g8WO1rsSE5lun2Cm16pkW9QK iaqpN4Fl1X7DRmrBqEEbZXy2PjaRPVT/rA== X-Google-Smtp-Source: APXvYqx67oTjjObdvaY3VYuFUBZ3SmHOv889hszmN5z478qhFvSt+0EIh8Ev/Vd0Y5pgdZQ5/MQuAA== X-Received: by 2002:a5d:6789:: with SMTP id v9mr38091600wru.55.1582120249549; Wed, 19 Feb 2020 05:50:49 -0800 (PST) Received: from brihaspati.fritz.box (p5DE53754.dip0.t-ipconnect.de. [93.229.55.84]) by smtp.gmail.com with ESMTPSA id y1sm3061881wrq.16.2020.02.19.05.50.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Feb 2020 05:50:48 -0800 (PST) From: Nirmoy Das X-Google-Original-From: Nirmoy Das To: dri-devel@lists.freedesktop.org Subject: [PATCH 5/8] drm/qxl: don't use ttm bo->offset Date: Wed, 19 Feb 2020 14:53:19 +0100 Message-Id: <20200219135322.56463-6-nirmoy.das@amd.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200219135322.56463-1-nirmoy.das@amd.com> References: <20200219135322.56463-1-nirmoy.das@amd.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 19 Feb 2020 16:18:11 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thellstrom@vmware.com, airlied@linux.ie, kenny.ho@amd.com, brian.welty@intel.com, amd-gfx@lists.freedesktop.org, nirmoy.das@amd.com, linux-graphics-maintainer@vmware.com, bskeggs@redhat.com, alexander.deucher@amd.com, sean@poorly.run, christian.koenig@amd.com, kraxel@redhat.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch removes slot->gpu_offset which is not required as VRAM and PRIV slot are in separate PCI bar This patch also removes unused qxl_bo_gpu_offset() Signed-off-by: Nirmoy Das Acked-by: Christian König Acked-by: Gerd Hoffmann --- drivers/gpu/drm/qxl/qxl_drv.h | 6 ++---- drivers/gpu/drm/qxl/qxl_kms.c | 5 ++--- drivers/gpu/drm/qxl/qxl_object.h | 5 ----- drivers/gpu/drm/qxl/qxl_ttm.c | 9 --------- 4 files changed, 4 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h index 27e45a2d6b52..df581f0e6699 100644 --- a/drivers/gpu/drm/qxl/qxl_drv.h +++ b/drivers/gpu/drm/qxl/qxl_drv.h @@ -134,7 +134,6 @@ struct qxl_memslot { uint64_t start_phys_addr; uint64_t size; uint64_t high_bits; - uint64_t gpu_offset; }; enum { @@ -311,10 +310,9 @@ qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo, (bo->tbo.mem.mem_type == TTM_PL_VRAM) ? &qdev->main_slot : &qdev->surfaces_slot; - WARN_ON_ONCE((bo->tbo.offset & slot->gpu_offset) != slot->gpu_offset); + /* TODO - need to hold one of the locks to read bo->tbo.mem.start */ - /* TODO - need to hold one of the locks to read tbo.offset */ - return slot->high_bits | (bo->tbo.offset - slot->gpu_offset + offset); + return slot->high_bits | ((bo->tbo.mem.start << PAGE_SHIFT) + offset); } /* qxl_display.c */ diff --git a/drivers/gpu/drm/qxl/qxl_kms.c b/drivers/gpu/drm/qxl/qxl_kms.c index 70b20ee4741a..7a5bf544f34d 100644 --- a/drivers/gpu/drm/qxl/qxl_kms.c +++ b/drivers/gpu/drm/qxl/qxl_kms.c @@ -86,11 +86,10 @@ static void setup_slot(struct qxl_device *qdev, high_bits <<= (64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits)); slot->high_bits = high_bits; - DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx, gpu_offset 0x%lx\n", + DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx\n", slot->index, slot->name, (unsigned long)slot->start_phys_addr, - (unsigned long)slot->size, - (unsigned long)slot->gpu_offset); + (unsigned long)slot->size); } void qxl_reinit_memslots(struct qxl_device *qdev) diff --git a/drivers/gpu/drm/qxl/qxl_object.h b/drivers/gpu/drm/qxl/qxl_object.h index 8ae54ba7857c..21fa81048f4f 100644 --- a/drivers/gpu/drm/qxl/qxl_object.h +++ b/drivers/gpu/drm/qxl/qxl_object.h @@ -48,11 +48,6 @@ static inline void qxl_bo_unreserve(struct qxl_bo *bo) ttm_bo_unreserve(&bo->tbo); } -static inline u64 qxl_bo_gpu_offset(struct qxl_bo *bo) -{ - return bo->tbo.offset; -} - static inline unsigned long qxl_bo_size(struct qxl_bo *bo) { return bo->tbo.num_pages << PAGE_SHIFT; diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c index 62a5e424971b..635d000e7934 100644 --- a/drivers/gpu/drm/qxl/qxl_ttm.c +++ b/drivers/gpu/drm/qxl/qxl_ttm.c @@ -51,11 +51,6 @@ static struct qxl_device *qxl_get_qdev(struct ttm_bo_device *bdev) static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, struct ttm_mem_type_manager *man) { - struct qxl_device *qdev = qxl_get_qdev(bdev); - unsigned int gpu_offset_shift = - 64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits + 8); - struct qxl_memslot *slot; - switch (type) { case TTM_PL_SYSTEM: /* System memory */ @@ -66,11 +61,7 @@ static int qxl_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, case TTM_PL_VRAM: case TTM_PL_PRIV: /* "On-card" video ram */ - slot = (type == TTM_PL_VRAM) ? - &qdev->main_slot : &qdev->surfaces_slot; - slot->gpu_offset = (uint64_t)type << gpu_offset_shift; man->func = &ttm_bo_manager_func; - man->gpu_offset = slot->gpu_offset; man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE; man->available_caching = TTM_PL_MASK_CACHING;