From patchwork Mon Mar 9 13:38:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11427145 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 565C592A for ; Mon, 9 Mar 2020 13:38:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3E5F320675 for ; Mon, 9 Mar 2020 13:38:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3E5F320675 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E50D897F3; Mon, 9 Mar 2020 13:38:27 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id CBFBE897F3 for ; Mon, 9 Mar 2020 13:38:24 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Mar 2020 06:38:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,533,1574150400"; d="scan'208";a="235598241" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga008.fm.intel.com with SMTP; 09 Mar 2020 06:38:09 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 09 Mar 2020 15:38:09 +0200 From: Ville Syrjala To: dri-devel@lists.freedesktop.org Subject: [PATCH v2 04/33] drm/panel-ilitek-ili9322: Fix dotclocks Date: Mon, 9 Mar 2020 15:38:09 +0200 Message-Id: <20200309133809.32585-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200302203452.17977-5-ville.syrjala@linux.intel.com> References: <20200302203452.17977-5-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thierry Reding Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Ville Syrjälä The listed dotclocks are two orders of mangnitude out. Fix them. v2: Just divide everything by 100 (Linus) Cc: Linus Walleij Cc: Thierry Reding Signed-off-by: Ville Syrjälä Reviewed-by: Linus Walleij --- drivers/gpu/drm/panel/panel-ilitek-ili9322.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c index f394d53a7da4..09935520e606 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c @@ -540,7 +540,7 @@ static int ili9322_enable(struct drm_panel *panel) /* Serial RGB modes */ static const struct drm_display_mode srgb_320x240_mode = { - .clock = 2453500, + .clock = 24535, .hdisplay = 320, .hsync_start = 320 + 359, .hsync_end = 320 + 359 + 1, @@ -554,7 +554,7 @@ static const struct drm_display_mode srgb_320x240_mode = { }; static const struct drm_display_mode srgb_360x240_mode = { - .clock = 2700000, + .clock = 27000, .hdisplay = 360, .hsync_start = 360 + 35, .hsync_end = 360 + 35 + 1, @@ -569,7 +569,7 @@ static const struct drm_display_mode srgb_360x240_mode = { /* This is the only mode listed for parallel RGB in the datasheet */ static const struct drm_display_mode prgb_320x240_mode = { - .clock = 6400000, + .clock = 64000, .hdisplay = 320, .hsync_start = 320 + 38, .hsync_end = 320 + 38 + 1, @@ -584,7 +584,7 @@ static const struct drm_display_mode prgb_320x240_mode = { /* YUV modes */ static const struct drm_display_mode yuv_640x320_mode = { - .clock = 2454000, + .clock = 24540, .hdisplay = 640, .hsync_start = 640 + 252, .hsync_end = 640 + 252 + 1, @@ -598,7 +598,7 @@ static const struct drm_display_mode yuv_640x320_mode = { }; static const struct drm_display_mode yuv_720x360_mode = { - .clock = 2700000, + .clock = 27000, .hdisplay = 720, .hsync_start = 720 + 252, .hsync_end = 720 + 252 + 1, @@ -613,7 +613,7 @@ static const struct drm_display_mode yuv_720x360_mode = { /* BT.656 VGA mode, 640x480 */ static const struct drm_display_mode itu_r_bt_656_640_mode = { - .clock = 2454000, + .clock = 24540, .hdisplay = 640, .hsync_start = 640 + 3, .hsync_end = 640 + 3 + 1, @@ -628,7 +628,7 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = { /* BT.656 D1 mode 720x480 */ static const struct drm_display_mode itu_r_bt_656_720_mode = { - .clock = 2700000, + .clock = 27000, .hdisplay = 720, .hsync_start = 720 + 3, .hsync_end = 720 + 3 + 1,