From patchwork Fri Mar 27 12:42:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 11462319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D33BC13A4 for ; Fri, 27 Mar 2020 12:42:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BBFB92082D for ; Fri, 27 Mar 2020 12:42:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BBFB92082D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DAEAD6EA0F; Fri, 27 Mar 2020 12:42:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id C19A46EA0F; Fri, 27 Mar 2020 12:42:45 +0000 (UTC) IronPort-SDR: 3ZNutw0vMAHY05bGVhov8/a7VyrIndYjrd0ma28rDJ2Cf3QaCxufr52HH6DpIvYTtcOOBzQJir NbfCjhbDntog== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2020 05:42:45 -0700 IronPort-SDR: NfhkLARe2+8lccdjJFMPgwhNlhLTQSEIVdp8d3p5JjvaMxI5rm8TwTmDsVkXLEfXV3Bn2oNF5z ZsG82Vc2X47g== X-IronPort-AV: E=Sophos;i="5.72,312,1580803200"; d="scan'208";a="394365095" Received: from defretin-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.56.231]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Mar 2020 05:42:42 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH RESEND 2/7] drm/dsc: add helper for calculating rc buffer size from DPCD Date: Fri, 27 Mar 2020 14:42:24 +0200 Message-Id: <20200327124229.26461-2-jani.nikula@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200327124229.26461-1-jani.nikula@intel.com> References: <20200327124229.26461-1-jani.nikula@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, Manasi Navare , Harry Wentland , Vandita Kulkarni Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a helper for calculating the rc buffer size from the DCPD offsets DP_DSC_RC_BUF_BLK_SIZE and DP_DSC_RC_BUF_SIZE. Cc: Alex Deucher Cc: Harry Wentland Cc: Manasi Navare Cc: Vandita Kulkarni Signed-off-by: Jani Nikula Reviewed-by: Vandita Kulkarni --- drivers/gpu/drm/drm_dsc.c | 27 +++++++++++++++++++++++++++ include/drm/drm_dsc.h | 1 + 2 files changed, 28 insertions(+) diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c index 09afbc01ea94..ff602f7ec65b 100644 --- a/drivers/gpu/drm/drm_dsc.c +++ b/drivers/gpu/drm/drm_dsc.c @@ -49,6 +49,33 @@ void drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header) } EXPORT_SYMBOL(drm_dsc_dp_pps_header_init); +/** + * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes + * @rc_buffer_block_size: block size code, according to DPCD offset 62h + * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h + * + * return: + * buffer size in bytes, or 0 on invalid input + */ +int drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size) +{ + int size = 1024 * (rc_buffer_size + 1); + + switch (rc_buffer_block_size) { + case DP_DSC_RC_BUF_BLK_SIZE_1: + return 1 * size; + case DP_DSC_RC_BUF_BLK_SIZE_4: + return 4 * size; + case DP_DSC_RC_BUF_BLK_SIZE_16: + return 16 * size; + case DP_DSC_RC_BUF_BLK_SIZE_64: + return 64 * size; + default: + return 0; + } +} +EXPORT_SYMBOL(drm_dsc_dp_rc_buffer_size); + /** * drm_dsc_pps_payload_pack() - Populates the DSC PPS * diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 887954cbfc60..537a68330840 100644 --- a/include/drm/drm_dsc.h +++ b/include/drm/drm_dsc.h @@ -602,6 +602,7 @@ struct drm_dsc_pps_infoframe { } __packed; void drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header); +int drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size); void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_sdp, const struct drm_dsc_config *dsc_cfg); int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg);