diff mbox series

[v2,14/17] drm/i915: Replace I915_MODE_FLAG_INHERITED with a boolean

Message ID 20200403204008.14864-15-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm: Put drm_display_mode on diet | expand

Commit Message

Ville Syrjälä April 3, 2020, 8:40 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

There's no reason for I915_MODE_FLAG_INHERITED to exist as a flag
anymore. Just make it a boolean.

CC: Sam Ravnborg <sam@ravnborg.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_atomic.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_display.c      | 15 ++++++---------
 .../gpu/drm/i915/display/intel_display_types.h    |  2 +-
 3 files changed, 8 insertions(+), 11 deletions(-)

Comments

Daniel Vetter April 7, 2020, 7:42 a.m. UTC | #1 
On Fri, Apr 03, 2020 at 11:40:05PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> There's no reason for I915_MODE_FLAG_INHERITED to exist as a flag
> anymore. Just make it a boolean.
> 
> CC: Sam Ravnborg <sam@ravnborg.org>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Emil Velikov <emil.l.velikov@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>

> ---
>  drivers/gpu/drm/i915/display/intel_atomic.c       |  2 +-
>  drivers/gpu/drm/i915/display/intel_display.c      | 15 ++++++---------
>  .../gpu/drm/i915/display/intel_display_types.h    |  2 +-
>  3 files changed, 8 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
> index 5863e339a426..2deafaa9ec74 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> @@ -249,10 +249,10 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>  	crtc_state->update_wm_post = false;
>  	crtc_state->fifo_changed = false;
>  	crtc_state->preload_luts = false;
> +	crtc_state->inherited = false;
>  	crtc_state->wm.need_postvbl_update = false;
>  	crtc_state->fb_bits = 0;
>  	crtc_state->update_planes = 0;
> -	crtc_state->mode_flags &= ~I915_MODE_FLAG_INHERITED;
>  
>  	return &crtc_state->uapi;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index d88cade45c35..550369444811 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6413,8 +6413,7 @@ static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_s
>  	 * We can't read out IPS on broadwell, assume the worst and
>  	 * forcibly enable IPS on the first fastset.
>  	 */
> -	if (new_crtc_state->update_pipe &&
> -	    old_crtc_state->mode_flags & I915_MODE_FLAG_INHERITED)
> +	if (new_crtc_state->update_pipe && old_crtc_state->inherited)
>  		return true;
>  
>  	return !old_crtc_state->ips_enabled;
> @@ -13516,8 +13515,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	bool ret = true;
>  	u32 bp_gamma = 0;
>  	bool fixup_inherited = fastset &&
> -		(current_config->mode_flags & I915_MODE_FLAG_INHERITED) &&
> -		!(pipe_config->mode_flags & I915_MODE_FLAG_INHERITED);
> +		current_config->inherited && !pipe_config->inherited;
>  
>  	if (fixup_inherited && !fastboot_enabled(dev_priv)) {
>  		drm_dbg_kms(&dev_priv->drm,
> @@ -14667,10 +14665,9 @@ static int intel_atomic_check(struct drm_device *dev,
>  	int ret, i;
>  	bool any_ms = false;
>  
> -	/* Catch I915_MODE_FLAG_INHERITED */
>  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>  					    new_crtc_state, i) {
> -		if (new_crtc_state->mode_flags != old_crtc_state->mode_flags)
> +		if (new_crtc_state->inherited != old_crtc_state->inherited)
>  			new_crtc_state->uapi.mode_changed = true;
>  	}
>  
> @@ -15016,7 +15013,7 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>  	 * of enabling them on the CRTC's first fastset.
>  	 */
>  	if (new_crtc_state->update_pipe && !modeset &&
> -	    old_crtc_state->mode_flags & I915_MODE_FLAG_INHERITED)
> +	    old_crtc_state->inherited)
>  		intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
>  }
>  
> @@ -17494,7 +17491,7 @@ static int intel_initial_commit(struct drm_device *dev)
>  			 * happen only for the first real commit from userspace.
>  			 * So preserve the inherited flag for the time being.
>  			 */
> -			crtc_state->mode_flags |= I915_MODE_FLAG_INHERITED;
> +			crtc_state->inherited = true;
>  
>  			ret = drm_atomic_add_affected_planes(state, &crtc->base);
>  			if (ret)
> @@ -18266,7 +18263,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  			 * set a flag to indicate that a full recalculation is
>  			 * needed on the next commit.
>  			 */
> -			crtc_state->mode_flags |= I915_MODE_FLAG_INHERITED;
> +			crtc_state->inherited = true;
>  
>  			intel_crtc_compute_pixel_rate(crtc_state);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 26df856f8b72..f529b14fbb2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -642,7 +642,6 @@ struct intel_crtc_scaler_state {
>  };
>  
>  /* {crtc,crtc_state}->mode_flags */
> -#define I915_MODE_FLAG_INHERITED (1<<0)
>  /* Flag to get scanline using frame time stamps */
>  #define I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP (1<<1)
>  /* Flag to use the scanline counter instead of the pixel counter */
> @@ -837,6 +836,7 @@ struct intel_crtc_state {
>  	bool update_wm_pre, update_wm_post; /* watermarks are updated */
>  	bool fifo_changed; /* FIFO split is changed */
>  	bool preload_luts;
> +	bool inherited; /* state inherited from BIOS? */
>  
>  	/* Pipe source size (ie. panel fitter input size)
>  	 * All planes will be positioned inside this space,
> -- 
> 2.24.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 5863e339a426..2deafaa9ec74 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -249,10 +249,10 @@  intel_crtc_duplicate_state(struct drm_crtc *crtc)
 	crtc_state->update_wm_post = false;
 	crtc_state->fifo_changed = false;
 	crtc_state->preload_luts = false;
+	crtc_state->inherited = false;
 	crtc_state->wm.need_postvbl_update = false;
 	crtc_state->fb_bits = 0;
 	crtc_state->update_planes = 0;
-	crtc_state->mode_flags &= ~I915_MODE_FLAG_INHERITED;
 
 	return &crtc_state->uapi;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d88cade45c35..550369444811 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6413,8 +6413,7 @@  static bool hsw_post_update_enable_ips(const struct intel_crtc_state *old_crtc_s
 	 * We can't read out IPS on broadwell, assume the worst and
 	 * forcibly enable IPS on the first fastset.
 	 */
-	if (new_crtc_state->update_pipe &&
-	    old_crtc_state->mode_flags & I915_MODE_FLAG_INHERITED)
+	if (new_crtc_state->update_pipe && old_crtc_state->inherited)
 		return true;
 
 	return !old_crtc_state->ips_enabled;
@@ -13516,8 +13515,7 @@  intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	bool ret = true;
 	u32 bp_gamma = 0;
 	bool fixup_inherited = fastset &&
-		(current_config->mode_flags & I915_MODE_FLAG_INHERITED) &&
-		!(pipe_config->mode_flags & I915_MODE_FLAG_INHERITED);
+		current_config->inherited && !pipe_config->inherited;
 
 	if (fixup_inherited && !fastboot_enabled(dev_priv)) {
 		drm_dbg_kms(&dev_priv->drm,
@@ -14667,10 +14665,9 @@  static int intel_atomic_check(struct drm_device *dev,
 	int ret, i;
 	bool any_ms = false;
 
-	/* Catch I915_MODE_FLAG_INHERITED */
 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
 					    new_crtc_state, i) {
-		if (new_crtc_state->mode_flags != old_crtc_state->mode_flags)
+		if (new_crtc_state->inherited != old_crtc_state->inherited)
 			new_crtc_state->uapi.mode_changed = true;
 	}
 
@@ -15016,7 +15013,7 @@  static void intel_update_crtc(struct intel_atomic_state *state,
 	 * of enabling them on the CRTC's first fastset.
 	 */
 	if (new_crtc_state->update_pipe && !modeset &&
-	    old_crtc_state->mode_flags & I915_MODE_FLAG_INHERITED)
+	    old_crtc_state->inherited)
 		intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
 }
 
@@ -17494,7 +17491,7 @@  static int intel_initial_commit(struct drm_device *dev)
 			 * happen only for the first real commit from userspace.
 			 * So preserve the inherited flag for the time being.
 			 */
-			crtc_state->mode_flags |= I915_MODE_FLAG_INHERITED;
+			crtc_state->inherited = true;
 
 			ret = drm_atomic_add_affected_planes(state, &crtc->base);
 			if (ret)
@@ -18266,7 +18263,7 @@  static void intel_modeset_readout_hw_state(struct drm_device *dev)
 			 * set a flag to indicate that a full recalculation is
 			 * needed on the next commit.
 			 */
-			crtc_state->mode_flags |= I915_MODE_FLAG_INHERITED;
+			crtc_state->inherited = true;
 
 			intel_crtc_compute_pixel_rate(crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 26df856f8b72..f529b14fbb2a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -642,7 +642,6 @@  struct intel_crtc_scaler_state {
 };
 
 /* {crtc,crtc_state}->mode_flags */
-#define I915_MODE_FLAG_INHERITED (1<<0)
 /* Flag to get scanline using frame time stamps */
 #define I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP (1<<1)
 /* Flag to use the scanline counter instead of the pixel counter */
@@ -837,6 +836,7 @@  struct intel_crtc_state {
 	bool update_wm_pre, update_wm_post; /* watermarks are updated */
 	bool fifo_changed; /* FIFO split is changed */
 	bool preload_luts;
+	bool inherited; /* state inherited from BIOS? */
 
 	/* Pipe source size (ie. panel fitter input size)
 	 * All planes will be positioned inside this space,