diff mbox series

drm/amd/display: code clean up in dce80_hw_sequencer.c

Message ID 20200413082249.23271-1-yanaijie@huawei.com (mailing list archive)
State New, archived
Headers show
Series drm/amd/display: code clean up in dce80_hw_sequencer.c | expand

Commit Message

Jason Yan April 13, 2020, 8:22 a.m. UTC
Fix the following gcc warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_hw_sequencer.c:43:46:
warning: ‘reg_offsets’ defined but not used [-Wunused-const-variable=]
 static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
                                              ^~~~~~~~~~~

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
---
 .../amd/display/dc/dce80/dce80_hw_sequencer.c | 28 -------------------
 1 file changed, 28 deletions(-)

Comments

Alex Deucher April 13, 2020, 3:08 p.m. UTC | #1
On Mon, Apr 13, 2020 at 5:29 AM Jason Yan <yanaijie@huawei.com> wrote:
>
> Fix the following gcc warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_hw_sequencer.c:43:46:
> warning: ‘reg_offsets’ defined but not used [-Wunused-const-variable=]
>  static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
>                                               ^~~~~~~~~~~
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: Jason Yan <yanaijie@huawei.com>

Applied.  Thanks!

Alex

> ---
>  .../amd/display/dc/dce80/dce80_hw_sequencer.c | 28 -------------------
>  1 file changed, 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
> index 893261c81854..d2ceebdbdf51 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
> @@ -36,34 +36,6 @@
>  #include "dce/dce_8_0_d.h"
>  #include "dce/dce_8_0_sh_mask.h"
>
> -struct dce80_hw_seq_reg_offsets {
> -       uint32_t crtc;
> -};
> -
> -static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
> -{
> -       .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
> -},
> -{
> -       .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
> -},
> -{
> -       .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
> -},
> -{
> -       .crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
> -},
> -{
> -       .crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
> -},
> -{
> -       .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
> -}
> -};
> -
> -#define HW_REG_CRTC(reg, id)\
> -       (reg + reg_offsets[id].crtc)
> -
>  /*******************************************************************************
>   * Private definitions
>   ******************************************************************************/
> --
> 2.21.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
index 893261c81854..d2ceebdbdf51 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
@@ -36,34 +36,6 @@ 
 #include "dce/dce_8_0_d.h"
 #include "dce/dce_8_0_sh_mask.h"
 
-struct dce80_hw_seq_reg_offsets {
-	uint32_t crtc;
-};
-
-static const struct dce80_hw_seq_reg_offsets reg_offsets[] = {
-{
-	.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
-},
-{
-	.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
-},
-{
-	.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
-},
-{
-	.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
-},
-{
-	.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
-},
-{
-	.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
-}
-};
-
-#define HW_REG_CRTC(reg, id)\
-	(reg + reg_offsets[id].crtc)
-
 /*******************************************************************************
  * Private definitions
  ******************************************************************************/