Message ID | 20200621004734.28602-9-laurent.pinchart+renesas@ideasonboard.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | dt-bindings: media: Conversion of Renesas bindings to YAML | expand |
Hi Laurent, Thanks for your patch. On 2020-06-21 03:47:34 +0300, Laurent Pinchart wrote: > The power-domains and resets properties are used in all DT sources in > the kernel but are absent from the bindings. Document them and make them > mandatory. > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > .../devicetree/bindings/media/renesas,vsp1.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > index 65e8ee61ce90..990e9c1dbc43 100644 > --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > @@ -29,6 +29,12 @@ properties: > clocks: > maxItems: 1 > > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > renesas,fcp: > $ref: /schemas/types.yaml#/definitions/phandle > description: > @@ -39,6 +45,8 @@ required: > - reg > - interrupts > - clocks > + - power-domains > + - resets > > additionalProperties: false > > @@ -59,24 +67,30 @@ examples: > - | > #include <dt-bindings/clock/renesas-cpg-mssr.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/power/r8a7790-sysc.h> > > vsp@fe928000 { > compatible = "renesas,vsp1"; > reg = <0xfe928000 0x8000>; > interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cpg CPG_MOD 131>; > + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; > + resets = <&cpg 131>; > }; > > # R8A77951 (R-Car H3) VSP2-BC > - | > #include <dt-bindings/clock/renesas-cpg-mssr.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/power/r8a7795-sysc.h> > > vsp@fe920000 { > compatible = "renesas,vsp2"; > reg = <0xfe920000 0x8000>; > interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&cpg CPG_MOD 624>; > + power-domains = <&sysc R8A7795_PD_A3VP>; > + resets = <&cpg 624>; > > renesas,fcp = <&fcpvb1>; > }; > -- > Regards, > > Laurent Pinchart >
On Sun, 21 Jun 2020 03:47:34 +0300, Laurent Pinchart wrote: > The power-domains and resets properties are used in all DT sources in > the kernel but are absent from the bindings. Document them and make them > mandatory. > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > .../devicetree/bindings/media/renesas,vsp1.yaml | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 65e8ee61ce90..990e9c1dbc43 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -29,6 +29,12 @@ properties: clocks: maxItems: 1 + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + renesas,fcp: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -39,6 +45,8 @@ required: - reg - interrupts - clocks + - power-domains + - resets additionalProperties: false @@ -59,24 +67,30 @@ examples: - | #include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7790-sysc.h> vsp@fe928000 { compatible = "renesas,vsp1"; reg = <0xfe928000 0x8000>; interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 131>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 131>; }; # R8A77951 (R-Car H3) VSP2-BC - | #include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7795-sysc.h> vsp@fe920000 { compatible = "renesas,vsp2"; reg = <0xfe920000 0x8000>; interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 624>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 624>; renesas,fcp = <&fcpvb1>; };