@@ -207,8 +207,9 @@ dsi1_out_ep: endpoint {
};
};
- lcd0: display {
+ lcd0: panel@0 {
compatible = "panel-dsi-cm";
+ reg = <0>;
label = "lcd0";
vddi-supply = <&lcd_regulator>;
reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
@@ -225,8 +225,9 @@ dsi_out_ep: endpoint {
};
};
- lcd0: display {
+ lcd0: panel@0 {
compatible = "nokia,himalaya", "panel-dsi-cm";
+ reg = <0>;
label = "lcd0";
pinctrl-names = "default";
@@ -898,6 +898,9 @@ dsi: encoder@4804fc00 {
ti,hwmods = "dss_dsi1";
clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
clock-names = "fck", "sys_clk";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
};
rfbi: encoder@48050800 {
@@ -662,8 +662,9 @@ dsi1_out_ep: endpoint {
};
};
- lcd0: display {
+ lcd0: panel@0 {
compatible = "tpo,taal", "panel-dsi-cm";
+ reg = <0>;
label = "lcd0";
reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
@@ -687,8 +688,9 @@ dsi2_out_ep: endpoint {
};
};
- lcd1: display {
+ lcd1: panel@0 {
compatible = "tpo,taal", "panel-dsi-cm";
+ reg = <0>;
label = "lcd1";
reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
@@ -551,6 +551,9 @@ dsi1: encoder@0 {
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
@@ -583,6 +586,9 @@ dsi2: encoder@0 {
clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
<&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
@@ -491,6 +491,9 @@ dsi1: encoder@0 {
status = "disabled";
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
@@ -522,6 +525,9 @@ dsi2: encoder@0 {
status = "disabled";
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};