diff mbox series

[3/3] drm/panel: simple: Add Chefree CH101OLHLWH-002 panel

Message ID 20200728201242.4336-3-marex@denx.de (mailing list archive)
State New, archived
Headers show
Series [1/3] dt-bindings: Add vendor prefix for Chefree | expand

Commit Message

Marek Vasut July 28, 2020, 8:12 p.m. UTC
Add support for the Chefree CH101OLHLWH-002 10.1" (1280x800)
color TFT LCD panel, connected over LVDS.

Timings are taken from the datasheet version P0.5.

Signed-off-by: Marek Vasut <marex@denx.de>
To: dri-devel@lists.freedesktop.org
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: devicetree@vger.kernel.org
---
 drivers/gpu/drm/panel/panel-simple.c | 33 ++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

Comments

Sam Ravnborg Aug. 2, 2020, 7:11 a.m. UTC | #1
Hi Marek.

On Tue, Jul 28, 2020 at 10:12:42PM +0200, Marek Vasut wrote:
> Add support for the Chefree CH101OLHLWH-002 10.1" (1280x800)
> color TFT LCD panel, connected over LVDS.
> 
> Timings are taken from the datasheet version P0.5.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> To: dri-devel@lists.freedesktop.org
I do not think "To:" is a valid syntax here.
So I changed to "Cc:" in all patches while applying.

Will be pushed out as soon as my builds pass.

	Sam

> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: devicetree@vger.kernel.org
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 33 ++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 298e3a26d9ee..a8e1f6306923 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -1414,6 +1414,36 @@ static const struct panel_desc cdtech_s070wv95_ct16 = {
>  	},
>  };
>  
> +static const struct display_timing chefree_ch101olhlwh_002_timing = {
> +	.pixelclock = { 68900000, 71100000, 73400000 },
> +	.hactive = { 1280, 1280, 1280 },
> +	.hfront_porch = { 65, 80, 95 },
> +	.hback_porch = { 64, 79, 94 },
> +	.hsync_len = { 1, 1, 1 },
> +	.vactive = { 800, 800, 800 },
> +	.vfront_porch = { 7, 11, 14 },
> +	.vback_porch = { 7, 11, 14 },
> +	.vsync_len = { 1, 1, 1 },
> +	.flags = DISPLAY_FLAGS_DE_HIGH,
> +};
> +
> +static const struct panel_desc chefree_ch101olhlwh_002 = {
> +	.timings = &chefree_ch101olhlwh_002_timing,
> +	.num_timings = 1,
> +	.bpc = 8,
> +	.size = {
> +		.width = 217,
> +		.height = 135,
> +	},
> +	.delay = {
> +		.enable = 200,
> +		.disable = 200,
> +	},
> +	.bus_flags = DRM_BUS_FLAG_DE_HIGH,
> +	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
> +	.connector_type = DRM_MODE_CONNECTOR_LVDS,
> +};
> +
>  static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
>  	.clock = 66770,
>  	.hdisplay = 800,
> @@ -3845,6 +3875,9 @@ static const struct of_device_id platform_of_match[] = {
>  	}, {
>  		.compatible = "cdtech,s070wv95-ct16",
>  		.data = &cdtech_s070wv95_ct16,
> +	}, {
> +		.compatible = "chefree,ch101olhlwh-002",
> +		.data = &chefree_ch101olhlwh_002,
>  	}, {
>  		.compatible = "chunghwa,claa070wp03xg",
>  		.data = &chunghwa_claa070wp03xg,
> -- 
> 2.27.0
diff mbox series

Patch

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 298e3a26d9ee..a8e1f6306923 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1414,6 +1414,36 @@  static const struct panel_desc cdtech_s070wv95_ct16 = {
 	},
 };
 
+static const struct display_timing chefree_ch101olhlwh_002_timing = {
+	.pixelclock = { 68900000, 71100000, 73400000 },
+	.hactive = { 1280, 1280, 1280 },
+	.hfront_porch = { 65, 80, 95 },
+	.hback_porch = { 64, 79, 94 },
+	.hsync_len = { 1, 1, 1 },
+	.vactive = { 800, 800, 800 },
+	.vfront_porch = { 7, 11, 14 },
+	.vback_porch = { 7, 11, 14 },
+	.vsync_len = { 1, 1, 1 },
+	.flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc chefree_ch101olhlwh_002 = {
+	.timings = &chefree_ch101olhlwh_002_timing,
+	.num_timings = 1,
+	.bpc = 8,
+	.size = {
+		.width = 217,
+		.height = 135,
+	},
+	.delay = {
+		.enable = 200,
+		.disable = 200,
+	},
+	.bus_flags = DRM_BUS_FLAG_DE_HIGH,
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+	.connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
 static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
 	.clock = 66770,
 	.hdisplay = 800,
@@ -3845,6 +3875,9 @@  static const struct of_device_id platform_of_match[] = {
 	}, {
 		.compatible = "cdtech,s070wv95-ct16",
 		.data = &cdtech_s070wv95_ct16,
+	}, {
+		.compatible = "chefree,ch101olhlwh-002",
+		.data = &chefree_ch101olhlwh_002,
 	}, {
 		.compatible = "chunghwa,claa070wp03xg",
 		.data = &chunghwa_claa070wp03xg,