| Message ID | 20200904160709.123970-4-bas@basnieuwenhuizen.nl (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | amd/display: Add GFX9+ modifier support. | expand |
Hi
[This is an automated email]
This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v5.8.7, v5.4.63, v4.19.143, v4.14.196, v4.9.235, v4.4.235.
v5.8.7: Build OK!
v5.4.63: Build OK!
v4.19.143: Failed to apply! Possible dependencies:
180db303ff46 ("drm/amd/display: Add below the range support for FreeSync")
7df7e505e82a ("drm/amd/display: Set requested plane state DCC params for GFX9")
8c3db1284a01 ("drm/amdgpu: fill in amdgpu_dm_remove_sink_from_freesync_module")
98e6436d3af5 ("drm/amd/display: Refactor FreeSync module")
c1ee92f94ce3 ("drm/amd: Add abm level drm property")
d999853e60a0 ("drm/amd/display: Guard against null stream dereference in do flip")
e5d0170e5644 ("drm/amd/display: Use non-deprecated vblank handler")
v4.14.196: Failed to apply! Possible dependencies:
1b0c0f9dc5ca ("drm/amdgpu: move userptr BOs to CPU domain during CS v2")
3fe89771cb0a ("drm/amdgpu: stop reserving the BO in the MMU callback v3")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
60de1c1740f3 ("drm/amdgpu: use a rw_semaphore for MMU notifiers")
7df7e505e82a ("drm/amd/display: Set requested plane state DCC params for GFX9")
9a18999640fa ("drm/amdgpu: move MMU notifier related defines to amdgpu_mn.h")
9cca0b8e5df0 ("drm/amdgpu: move amdgpu_cs_sysvm_access_required into find_mapping")
a216ab09955d ("drm/amdgpu: fix userptr put_page handling")
b72cf4fca2bb ("drm/amdgpu: move taking mmap_sem into get_user_pages v2")
ca666a3c298f ("drm/amdgpu: stop using BO status for user pages")
e7b07ceef2a6 ("drm/amd/display: Merge amdgpu_dm_types and amdgpu_dm")
v4.9.235: Failed to apply! Possible dependencies:
1cec20f0ea0e ("dma-buf: Restart reservation_object_wait_timeout_rcu() after writes")
248a1d6f1ac4 ("drm/amd: fix include notation and remove -Iinclude/drm flag")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
78010cd9736e ("dma-buf/fence: add an lockdep_assert_held()")
7df7e505e82a ("drm/amd/display: Set requested plane state DCC params for GFX9")
e7b07ceef2a6 ("drm/amd/display: Merge amdgpu_dm_types and amdgpu_dm")
f54d1867005c ("dma-buf: Rename struct fence to dma_fence")
fedf54132d24 ("dma-buf: Restart reservation_object_get_fences_rcu() after writes")
v4.4.235: Failed to apply! Possible dependencies:
0f477c6dea70 ("staging/android/sync: add sync_fence_create_dma")
1f7371b2a5fa ("drm/amd/powerplay: add basic powerplay framework")
248a1d6f1ac4 ("drm/amd: fix include notation and remove -Iinclude/drm flag")
288912cb95d1 ("drm/amdgpu: use $(src) in Makefile (v2)")
375fb53ec1be ("staging: android: replace explicit NULL comparison")
395dec6f6bc5 ("Documentation: add doc for sync_file_get_fence()")
4325198180e5 ("drm/amdgpu: remove GART page addr array")
4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
62304fb1fc08 ("dma-buf/sync_file: de-stage sync_file")
7df7e505e82a ("drm/amd/display: Set requested plane state DCC params for GFX9")
a1d29476d666 ("drm/amdgpu: optionally enable GART debugfs file")
a8fe58cec351 ("drm/amd: add ACP driver support")
b70f014d58b9 ("drm/amdgpu: change default sched jobs to 32")
c784c82a3fd6 ("Documentation: add Sync File doc")
d4cab38e153d ("staging/android: prepare sync_file for de-staging")
d7fdb0ae9d11 ("staging/android: rename sync_fence to sync_file")
e7b07ceef2a6 ("drm/amd/display: Merge amdgpu_dm_types and amdgpu_dm")
f54d1867005c ("dma-buf: Rename struct fence to dma_fence")
fac8434dab96 ("Documentation: Fix some grammar mistakes in sync_file.txt")
fdba11f4079e ("drm/amdgpu: move all Kconfig options to amdgpu/Kconfig")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index cb31b5ed19f7..d06acaea16e8 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3742,6 +3742,7 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev, struct dc *dc = adev->dm.dc; struct dc_dcc_surface_param input; struct dc_surface_dcc_cap output; + uint64_t plane_address = afb->address + afb->base.offsets[0]; uint32_t offset = AMDGPU_TILING_GET(info, DCC_OFFSET_256B); uint32_t i64b = AMDGPU_TILING_GET(info, DCC_INDEPENDENT_64B) != 0; uint64_t dcc_address; @@ -3785,7 +3786,7 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev, AMDGPU_TILING_GET(info, DCC_PITCH_MAX) + 1; dcc->independent_64b_blks = i64b; - dcc_address = get_dcc_address(afb->address, info); + dcc_address = get_dcc_address(plane_address, info); address->grph.meta_addr.low_part = lower_32_bits(dcc_address); address->grph.meta_addr.high_part = upper_32_bits(dcc_address); @@ -3816,6 +3817,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, address->tmz_surface = tmz_surface; if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { + uint64_t addr = afb->address + fb->offsets[0]; + plane_size->surface_size.x = 0; plane_size->surface_size.y = 0; plane_size->surface_size.width = fb->width; @@ -3824,9 +3827,10 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, fb->pitches[0] / fb->format->cpp[0]; address->type = PLN_ADDR_TYPE_GRAPHICS; - address->grph.addr.low_part = lower_32_bits(afb->address); - address->grph.addr.high_part = upper_32_bits(afb->address); + address->grph.addr.low_part = lower_32_bits(addr); + address->grph.addr.high_part = upper_32_bits(addr); } else if (format < SURFACE_PIXEL_FORMAT_INVALID) { + uint64_t luma_addr = afb->address + fb->offsets[0]; uint64_t chroma_addr = afb->address + fb->offsets[1]; plane_size->surface_size.x = 0; @@ -3847,9 +3851,9 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, address->type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE; address->video_progressive.luma_addr.low_part = - lower_32_bits(afb->address); + lower_32_bits(luma_addr); address->video_progressive.luma_addr.high_part = - upper_32_bits(afb->address); + upper_32_bits(luma_addr); address->video_progressive.chroma_addr.low_part = lower_32_bits(chroma_addr); address->video_progressive.chroma_addr.high_part =
With modifiers I'd like to support non-dedicated buffers for images. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: stable@vger.kernel.org --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)