Message ID | 20200914055633.21109-5-karthik.b.s@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Asynchronous flip implementation for i915 | expand |
On Mon, Sep 14, 2020 at 11:26:29AM +0530, Karthik B S wrote: > Since the flip done event will be sent in the flip_done_handler, > no need to add the event to the list and delay it for later. > > v2: -Moved the async check above vblank_get as it > was causing issues for PSR. > > v3: -No need to wait for vblank to pass, as this wait was causing a > 16ms delay once every few flips. > > v4: -Rebased. > > v5: -Rebased. > > v6: -Rebased. > > v7: -No need of irq disable if we are not doing vblank evade. (Ville) > > v8: -Rebased. > > Signed-off-by: Karthik B S <karthik.b.s@intel.com> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > --- > drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c > index 5ac0dbf0e03d..f0c89418d2e1 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -93,6 +93,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) > DEFINE_WAIT(wait); > u32 psr_status; > > + if (new_crtc_state->uapi.async_flip) > + return; > + > vblank_start = adjusted_mode->crtc_vblank_start; > if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > vblank_start = DIV_ROUND_UP(vblank_start, 2); > @@ -202,6 +205,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) > > trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); > > + if (new_crtc_state->uapi.async_flip) > + return; The pipe update tracepoints will be inconsistent if you put this here. I guess we don't really need the pipe update tracepoints for async flips. We might want to add a separate tracepoint for async flip itself, or perhaps convey the sync vs. async information via the current plane update tracepoint. With this moved to before the tracepoint Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > + > /* We're still in the vblank-evade critical section, this can't race. > * Would be slightly nice to just grab the vblank count and arm the > * event outside of the critical section - the spinlock might spin for a > -- > 2.22.0
On 9/15/2020 7:37 PM, Ville Syrjälä wrote: > On Mon, Sep 14, 2020 at 11:26:29AM +0530, Karthik B S wrote: >> Since the flip done event will be sent in the flip_done_handler, >> no need to add the event to the list and delay it for later. >> >> v2: -Moved the async check above vblank_get as it >> was causing issues for PSR. >> >> v3: -No need to wait for vblank to pass, as this wait was causing a >> 16ms delay once every few flips. >> >> v4: -Rebased. >> >> v5: -Rebased. >> >> v6: -Rebased. >> >> v7: -No need of irq disable if we are not doing vblank evade. (Ville) >> >> v8: -Rebased. >> >> Signed-off-by: Karthik B S <karthik.b.s@intel.com> >> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> >> --- >> drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c >> index 5ac0dbf0e03d..f0c89418d2e1 100644 >> --- a/drivers/gpu/drm/i915/display/intel_sprite.c >> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c >> @@ -93,6 +93,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) >> DEFINE_WAIT(wait); >> u32 psr_status; >> >> + if (new_crtc_state->uapi.async_flip) >> + return; >> + >> vblank_start = adjusted_mode->crtc_vblank_start; >> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) >> vblank_start = DIV_ROUND_UP(vblank_start, 2); >> @@ -202,6 +205,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) >> >> trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); >> >> + if (new_crtc_state->uapi.async_flip) >> + return; > > The pipe update tracepoints will be inconsistent if you put this here. > I guess we don't really need the pipe update tracepoints for async > flips. We might want to add a separate tracepoint for async flip itself, > or perhaps convey the sync vs. async information via the current > plane update tracepoint. > Thanks for the review. Sure, I'll move this before the tracepoint. > With this moved to before the tracepoint > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Thanks for the RB. Thanks, Karthik.B.S >> + >> /* We're still in the vblank-evade critical section, this can't race. >> * Would be slightly nice to just grab the vblank count and arm the >> * event outside of the critical section - the spinlock might spin for a >> -- >> 2.22.0 >
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 5ac0dbf0e03d..f0c89418d2e1 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -93,6 +93,9 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) DEFINE_WAIT(wait); u32 psr_status; + if (new_crtc_state->uapi.async_flip) + return; + vblank_start = adjusted_mode->crtc_vblank_start; if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) vblank_start = DIV_ROUND_UP(vblank_start, 2); @@ -202,6 +205,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end); + if (new_crtc_state->uapi.async_flip) + return; + /* We're still in the vblank-evade critical section, this can't race. * Would be slightly nice to just grab the vblank count and arm the * event outside of the critical section - the spinlock might spin for a