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Mon, 23 Nov 2020 03:20:05 -0800 (PST) Received: from dell.default ([91.110.221.218]) by smtp.gmail.com with ESMTPSA id n9sm16317290wmd.4.2020.11.23.03.20.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Nov 2020 03:20:04 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 30/40] drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused Date: Mon, 23 Nov 2020 11:19:09 +0000 Message-Id: <20201123111919.233376-31-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201123111919.233376-1-lee.jones@linaro.org> References: <20201123111919.233376-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , Tao Zhou , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Jiansong Chen , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , Hawking Zhang Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): In file included from drivers/gpu/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c:28: drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:151:29: warning: ‘UMC_BASE’ defined but not used [-Wunused-const-variable=] 151 | static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:81:29: warning: ‘FUSE_BASE’ defined but not used [-Wunused-const-variable=] 81 | static const struct IP_BASE FUSE_BASE = { { { { 0x00017400, 0x02401400, 0, 0, 0, 0 } }, | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:74:29: warning: ‘DPCS_BASE’ defined but not used [-Wunused-const-variable=] 74 | static const struct IP_BASE DPCS_BASE = { { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0x02403C00, 0 } }, | ^~~~~~~~~ NB: Snipped lots of these Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Tao Zhou Cc: Hawking Zhang Cc: Jiansong Chen Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h b/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h index b41263de8a9b6..f84996a73de94 100644 --- a/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h +++ b/drivers/gpu/drm/amd/include/dimgrey_cavefish_ip_offset.h @@ -33,7 +33,7 @@ struct IP_BASE_INSTANCE struct IP_BASE { struct IP_BASE_INSTANCE instance[MAX_INSTANCE]; -}; +} __maybe_unused; static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x02408C00, 0, 0, 0, 0 } },