From patchwork Thu Dec 10 14:08:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 11964815 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4799DC4167B for ; Thu, 10 Dec 2020 14:09:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DE77222BF5 for ; Thu, 10 Dec 2020 14:09:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DE77222BF5 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8B7E6E5B9; Thu, 10 Dec 2020 14:09:28 +0000 (UTC) Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by gabe.freedesktop.org (Postfix) with ESMTPS id 121EF6E5CA for ; Thu, 10 Dec 2020 14:09:28 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAE9Efd076557; Thu, 10 Dec 2020 08:09:14 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607609354; bh=/0noUIDI1kC3NNn9hsmFCto6oZcn4JaA8AYXIIP6wPc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eFHbA88xVow/ds7PRGV6LHnnu2p/u/GLqX5jBTFfc6izXTk2NAUKjkkY8SWLRuRwK +QXRyKuX86FHD8MWGS1MGBz5lGWjy5/gt3oK0dJ2n+ZsJ63k0e/P3eWpn+wWiBmpyi mz3/9ChR31bfswcpHB3hoW3KtYfiaWgV9sJvzVT0= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAE9DHQ063562 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 08:09:14 -0600 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 08:09:13 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 08:09:13 -0600 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAE90cC086731; Thu, 10 Dec 2020 08:09:09 -0600 From: Tomi Valkeinen To: , Daniel Vetter , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Laurent Pinchart Subject: [PATCH v3 2/2] drm: add legacy support for using degamma for gamma Date: Thu, 10 Dec 2020 16:08:52 +0200 Message-ID: <20201210140852.1040054-3-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201210140852.1040054-1-tomi.valkeinen@ti.com> References: <20201210140852.1040054-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yannick Fertre , Philippe Cornu , David Airlie , Russell King , Sandy Huang , Paul Cercueil , Tomi Valkeinen , Thomas Zimmermann , Matthias Brugger , Vincent Abriou , Maxime Coquelin , Alexandre Torgue Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The DRM core handles legacy gamma-set ioctl by setting GAMMA_LUT and clearing CTM and DEGAMMA_LUT. This works fine on HW where we have either: degamma -> ctm -> gamma -> out or ctm -> gamma -> out However, if the HW has gamma table before ctm, the atomic property should be DEGAMMA_LUT, and thus we have: degamma -> ctm -> out This is fine for userspace which sets gamma table using the properties, as the userspace can check for the existence of gamma & degamma, but the legacy gamma-set ioctl does not work. Change the DRM core to use DEGAMMA_LUT instead of GAMMA_LUT when the latter is unavailable. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/drm_color_mgmt.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index c4e4d59c4432..8733d9d95b82 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -238,6 +238,7 @@ EXPORT_SYMBOL(drm_mode_crtc_set_gamma_size); bool drm_crtc_supports_legacy_gamma(struct drm_crtc *crtc) { uint32_t gamma_id = crtc->dev->mode_config.gamma_lut_property->base.id; + uint32_t degamma_id = crtc->dev->mode_config.degamma_lut_property->base.id; if (!crtc->gamma_size) return false; @@ -245,7 +246,8 @@ bool drm_crtc_supports_legacy_gamma(struct drm_crtc *crtc) if (crtc->funcs->gamma_set) return true; - return !!drm_mode_obj_find_prop_id(&crtc->base, gamma_id); + return !!(drm_mode_obj_find_prop_id(&crtc->base, gamma_id) || + drm_mode_obj_find_prop_id(&crtc->base, degamma_id)); } EXPORT_SYMBOL(drm_crtc_supports_legacy_gamma); @@ -256,18 +258,28 @@ EXPORT_SYMBOL(drm_crtc_supports_legacy_gamma); * @blob: property blob for the gamma ramp * * Set given gamma ramp to the crtc using GAMMA_LUT property and resetting - * DEGAMMA_LUT and CTM. + * DEGAMMA_LUT and CTM, or if GAMMA_LUT is not available, using DEGAMMA_LUT + * and resetting GAMMA_LUT and CTM. */ int drm_crtc_gamma_ramp_set(struct drm_atomic_state *state, struct drm_crtc *crtc, struct drm_property_blob *blob) { + uint32_t gamma_id = crtc->dev->mode_config.gamma_lut_property->base.id; + uint32_t degamma_id = crtc->dev->mode_config.degamma_lut_property->base.id; struct drm_crtc_state *crtc_state; struct drm_property_blob *gamma_blob; struct drm_property_blob *degamma_blob; bool replaced; - gamma_blob = blob; - degamma_blob = NULL; + if (drm_mode_obj_find_prop_id(&crtc->base, gamma_id)) { + gamma_blob = blob; + degamma_blob = NULL; + } else if (drm_mode_obj_find_prop_id(&crtc->base, degamma_id)) { + gamma_blob = NULL; + degamma_blob = blob; + } else { + return -ENODEV; + } crtc_state = drm_atomic_get_crtc_state(state, crtc); if (IS_ERR(crtc_state))