| Message ID | 20210108201457.3078600-13-lee.jones@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Rid W=1 warnings from GPU | expand |
On Fri, Jan 8, 2021 at 3:15 PM Lee Jones <lee.jones@linaro.org> wrote: > > Fixes the following W=1 kernel build warning(s): > > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:5474:5: warning: no previous prototype for ‘vega10_hwmgr_init’ [-Wmissing-prototypes] > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:551: warning: Function parameter or member 'hwmgr' not described in 'vega10_get_evv_voltages' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'hwmgr' not described in 'vega10_patch_with_vdd_leakage' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'voltage' not described in 'vega10_patch_with_vdd_leakage' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'leakage_table' not described in 'vega10_patch_with_vdd_leakage' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'hwmgr' not described in 'vega10_patch_lookup_table_with_leakage' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'lookup_table' not described in 'vega10_patch_lookup_table_with_leakage' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'leakage_table' not described in 'vega10_patch_lookup_table_with_leakage' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1013: warning: Function parameter or member 'hwmgr' not described in 'vega10_trim_voltage_table' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1013: warning: Function parameter or member 'vol_table' not described in 'vega10_trim_voltage_table' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1160: warning: Function parameter or member 'hwmgr' not described in 'vega10_construct_voltage_tables' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'hwmgr' not described in 'vega10_populate_single_gfx_level' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'gfx_clock' not described in 'vega10_populate_single_gfx_level' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'current_gfxclk_level' not described in 'vega10_populate_single_gfx_level' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'acg_freq' not described in 'vega10_populate_single_gfx_level' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1613: warning: Cannot understand * @brief Populates single SMC SOCCLK structure using the provided clock. > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1667: warning: Function parameter or member 'hwmgr' not described in 'vega10_populate_all_graphic_levels' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1750: warning: Cannot understand * @brief Populates single SMC GFXCLK structure using the provided clock. > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1811: warning: Cannot understand * @brief Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2496: warning: Function parameter or member 'hwmgr' not described in 'vega10_init_smc_table' > drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2867: warning: Cannot understand * @brief Tell SMC to enabled the supported DPMs. > > Cc: Evan Quan <evan.quan@amd.com> > Cc: Alex Deucher <alexander.deucher@amd.com> > Cc: "Christian König" <christian.koenig@amd.com> > Cc: David Airlie <airlied@linux.ie> > Cc: Daniel Vetter <daniel@ffwll.ch> > Cc: amd-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Signed-off-by: Lee Jones <lee.jones@linaro.org> Applied. Thanks! Alex > --- > .../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 133 +++++++++--------- > 1 file changed, 65 insertions(+), 68 deletions(-) > > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c > index 1b47f94e03317..da470462d6e2c 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c > @@ -542,11 +542,11 @@ static int vega10_get_socclk_for_voltage_evv(struct pp_hwmgr *hwmgr, > > #define ATOM_VIRTUAL_VOLTAGE_ID0 0xff01 > /** > -* Get Leakage VDDC based on leakage ID. > -* > -* @param hwmgr the address of the powerplay hardware manager. > -* @return always 0. > -*/ > + * Get Leakage VDDC based on leakage ID. > + * > + * @hwmgr: the address of the powerplay hardware manager. > + * return: always 0. > + */ > static int vega10_get_evv_voltages(struct pp_hwmgr *hwmgr) > { > struct vega10_hwmgr *data = hwmgr->backend; > @@ -600,9 +600,9 @@ static int vega10_get_evv_voltages(struct pp_hwmgr *hwmgr) > /** > * Change virtual leakage voltage to actual value. > * > - * @param hwmgr the address of the powerplay hardware manager. > - * @param pointer to changing voltage > - * @param pointer to leakage table > + * @hwmgr: the address of the powerplay hardware manager. > + * @voltage: pointer to changing voltage > + * @leakage_table: pointer to leakage table > */ > static void vega10_patch_with_vdd_leakage(struct pp_hwmgr *hwmgr, > uint16_t *voltage, struct vega10_leakage_voltage *leakage_table) > @@ -624,13 +624,13 @@ static void vega10_patch_with_vdd_leakage(struct pp_hwmgr *hwmgr, > } > > /** > -* Patch voltage lookup table by EVV leakages. > -* > -* @param hwmgr the address of the powerplay hardware manager. > -* @param pointer to voltage lookup table > -* @param pointer to leakage table > -* @return always 0 > -*/ > + * Patch voltage lookup table by EVV leakages. > + * > + * @hwmgr: the address of the powerplay hardware manager. > + * @lookup_table: pointer to voltage lookup table > + * @leakage_table: pointer to leakage table > + * return: always 0 > + */ > static int vega10_patch_lookup_table_with_leakage(struct pp_hwmgr *hwmgr, > phm_ppt_v1_voltage_lookup_table *lookup_table, > struct vega10_leakage_voltage *leakage_table) > @@ -1001,13 +1001,12 @@ static int vega10_setup_asic_task(struct pp_hwmgr *hwmgr) > } > > /** > -* Remove repeated voltage values and create table with unique values. > -* > -* @param hwmgr the address of the powerplay hardware manager. > -* @param vol_table the pointer to changing voltage table > -* @return 0 in success > -*/ > - > + * Remove repeated voltage values and create table with unique values. > + * > + * @hwmgr: the address of the powerplay hardware manager. > + * @vol_table: the pointer to changing voltage table > + * return: 0 in success > + */ > static int vega10_trim_voltage_table(struct pp_hwmgr *hwmgr, > struct pp_atomfwctrl_voltage_table *vol_table) > { > @@ -1151,11 +1150,11 @@ static void vega10_trim_voltage_table_to_fit_state_table( > } > > /** > -* Create Voltage Tables. > -* > -* @param hwmgr the address of the powerplay hardware manager. > -* @return always 0 > -*/ > + * Create Voltage Tables. > + * > + * @hwmgr: the address of the powerplay hardware manager. > + * return: always 0 > + */ > static int vega10_construct_voltage_tables(struct pp_hwmgr *hwmgr) > { > struct vega10_hwmgr *data = hwmgr->backend; > @@ -1212,11 +1211,11 @@ static int vega10_construct_voltage_tables(struct pp_hwmgr *hwmgr) > } > > /* > - * @fn vega10_init_dpm_state > - * @brief Function to initialize all Soft Min/Max and Hard Min/Max to 0xff. > + * vega10_init_dpm_state > + * Function to initialize all Soft Min/Max and Hard Min/Max to 0xff. > * > - * @param dpm_state - the address of the DPM Table to initiailize. > - * @return None. > + * @dpm_state: - the address of the DPM Table to initiailize. > + * return: None. > */ > static void vega10_init_dpm_state(struct vega10_dpm_state *dpm_state) > { > @@ -1460,11 +1459,11 @@ static int vega10_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) > } > > /* > - * @fn vega10_populate_ulv_state > - * @brief Function to provide parameters for Utral Low Voltage state to SMC. > + * vega10_populate_ulv_state > + * Function to provide parameters for Utral Low Voltage state to SMC. > * > - * @param hwmgr - the address of the hardware manager. > - * @return Always 0. > + * @hwmgr: - the address of the hardware manager. > + * return: Always 0. > */ > static int vega10_populate_ulv_state(struct pp_hwmgr *hwmgr) > { > @@ -1545,13 +1544,12 @@ static int vega10_populate_smc_link_levels(struct pp_hwmgr *hwmgr) > } > > /** > -* Populates single SMC GFXSCLK structure using the provided engine clock > -* > -* @param hwmgr the address of the hardware manager > -* @param gfx_clock the GFX clock to use to populate the structure. > -* @param current_gfxclk_level location in PPTable for the SMC GFXCLK structure. > -*/ > - > + * Populates single SMC GFXSCLK structure using the provided engine clock > + * > + * @hwmgr: the address of the hardware manager > + * @gfx_clock: the GFX clock to use to populate the structure. > + * @current_gfxclk_level: location in PPTable for the SMC GFXCLK structure. > + */ > static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, > uint32_t gfx_clock, PllSetting_t *current_gfxclk_level, > uint32_t *acg_freq) > @@ -1610,12 +1608,12 @@ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, > } > > /** > - * @brief Populates single SMC SOCCLK structure using the provided clock. > + * Populates single SMC SOCCLK structure using the provided clock. > * > - * @param hwmgr - the address of the hardware manager. > - * @param soc_clock - the SOC clock to use to populate the structure. > - * @param current_socclk_level - location in PPTable for the SMC SOCCLK structure. > - * @return 0 on success.. > + * @hwmgr: the address of the hardware manager. > + * @soc_clock: the SOC clock to use to populate the structure. > + * @current_socclk_level: location in PPTable for the SMC SOCCLK structure. > + * return: 0 on success > */ > static int vega10_populate_single_soc_level(struct pp_hwmgr *hwmgr, > uint32_t soc_clock, uint8_t *current_soc_did, > @@ -1659,10 +1657,10 @@ static int vega10_populate_single_soc_level(struct pp_hwmgr *hwmgr, > } > > /** > -* Populates all SMC SCLK levels' structure based on the trimmed allowed dpm engine clock states > -* > -* @param hwmgr the address of the hardware manager > -*/ > + * Populates all SMC SCLK levels' structure based on the trimmed allowed dpm engine clock states > + * > + * @hwmgr: the address of the hardware manager > + */ > static int vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) > { > struct vega10_hwmgr *data = hwmgr->backend; > @@ -1747,11 +1745,11 @@ static void vega10_populate_vddc_soc_levels(struct pp_hwmgr *hwmgr) > } > > /** > - * @brief Populates single SMC GFXCLK structure using the provided clock. > + * Populates single SMC GFXCLK structure using the provided clock. > * > - * @param hwmgr - the address of the hardware manager. > - * @param mem_clock - the memory clock to use to populate the structure. > - * @return 0 on success.. > + * @hwmgr: the address of the hardware manager. > + * @mem_clock: the memory clock to use to populate the structure. > + * return: 0 on success.. > */ > static int vega10_populate_single_memory_level(struct pp_hwmgr *hwmgr, > uint32_t mem_clock, uint8_t *current_mem_vid, > @@ -1808,10 +1806,10 @@ static int vega10_populate_single_memory_level(struct pp_hwmgr *hwmgr, > } > > /** > - * @brief Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. > + * Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. > * > - * @param pHwMgr - the address of the hardware manager. > - * @return PP_Result_OK on success. > + * @hwmgr: the address of the hardware manager. > + * return: PP_Result_OK on success. > */ > static int vega10_populate_all_memory_levels(struct pp_hwmgr *hwmgr) > { > @@ -2486,12 +2484,11 @@ static void vega10_check_dpm_table_updated(struct pp_hwmgr *hwmgr) > } > > /** > -* Initializes the SMC table and uploads it > -* > -* @param hwmgr the address of the powerplay hardware manager. > -* @param pInput the pointer to input data (PowerState) > -* @return always 0 > -*/ > + * Initializes the SMC table and uploads it > + * > + * @hwmgr: the address of the powerplay hardware manager. > + * return: always 0 > + */ > static int vega10_init_smc_table(struct pp_hwmgr *hwmgr) > { > int result; > @@ -2864,11 +2861,11 @@ static int vega10_stop_dpm(struct pp_hwmgr *hwmgr, uint32_t bitmap) > } > > /** > - * @brief Tell SMC to enabled the supported DPMs. > + * Tell SMC to enabled the supported DPMs. > * > - * @param hwmgr - the address of the powerplay hardware manager. > - * @Param bitmap - bitmap for the features to enabled. > - * @return 0 on at least one DPM is successfully enabled. > + * @hwmgr: the address of the powerplay hardware manager. > + * @bitmap bitmap for the features to enabled. > + * return: 0 on at least one DPM is successfully enabled. > */ > static int vega10_start_dpm(struct pp_hwmgr *hwmgr, uint32_t bitmap) > { > -- > 2.25.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c index 1b47f94e03317..da470462d6e2c 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c @@ -542,11 +542,11 @@ static int vega10_get_socclk_for_voltage_evv(struct pp_hwmgr *hwmgr, #define ATOM_VIRTUAL_VOLTAGE_ID0 0xff01 /** -* Get Leakage VDDC based on leakage ID. -* -* @param hwmgr the address of the powerplay hardware manager. -* @return always 0. -*/ + * Get Leakage VDDC based on leakage ID. + * + * @hwmgr: the address of the powerplay hardware manager. + * return: always 0. + */ static int vega10_get_evv_voltages(struct pp_hwmgr *hwmgr) { struct vega10_hwmgr *data = hwmgr->backend; @@ -600,9 +600,9 @@ static int vega10_get_evv_voltages(struct pp_hwmgr *hwmgr) /** * Change virtual leakage voltage to actual value. * - * @param hwmgr the address of the powerplay hardware manager. - * @param pointer to changing voltage - * @param pointer to leakage table + * @hwmgr: the address of the powerplay hardware manager. + * @voltage: pointer to changing voltage + * @leakage_table: pointer to leakage table */ static void vega10_patch_with_vdd_leakage(struct pp_hwmgr *hwmgr, uint16_t *voltage, struct vega10_leakage_voltage *leakage_table) @@ -624,13 +624,13 @@ static void vega10_patch_with_vdd_leakage(struct pp_hwmgr *hwmgr, } /** -* Patch voltage lookup table by EVV leakages. -* -* @param hwmgr the address of the powerplay hardware manager. -* @param pointer to voltage lookup table -* @param pointer to leakage table -* @return always 0 -*/ + * Patch voltage lookup table by EVV leakages. + * + * @hwmgr: the address of the powerplay hardware manager. + * @lookup_table: pointer to voltage lookup table + * @leakage_table: pointer to leakage table + * return: always 0 + */ static int vega10_patch_lookup_table_with_leakage(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table, struct vega10_leakage_voltage *leakage_table) @@ -1001,13 +1001,12 @@ static int vega10_setup_asic_task(struct pp_hwmgr *hwmgr) } /** -* Remove repeated voltage values and create table with unique values. -* -* @param hwmgr the address of the powerplay hardware manager. -* @param vol_table the pointer to changing voltage table -* @return 0 in success -*/ - + * Remove repeated voltage values and create table with unique values. + * + * @hwmgr: the address of the powerplay hardware manager. + * @vol_table: the pointer to changing voltage table + * return: 0 in success + */ static int vega10_trim_voltage_table(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_voltage_table *vol_table) { @@ -1151,11 +1150,11 @@ static void vega10_trim_voltage_table_to_fit_state_table( } /** -* Create Voltage Tables. -* -* @param hwmgr the address of the powerplay hardware manager. -* @return always 0 -*/ + * Create Voltage Tables. + * + * @hwmgr: the address of the powerplay hardware manager. + * return: always 0 + */ static int vega10_construct_voltage_tables(struct pp_hwmgr *hwmgr) { struct vega10_hwmgr *data = hwmgr->backend; @@ -1212,11 +1211,11 @@ static int vega10_construct_voltage_tables(struct pp_hwmgr *hwmgr) } /* - * @fn vega10_init_dpm_state - * @brief Function to initialize all Soft Min/Max and Hard Min/Max to 0xff. + * vega10_init_dpm_state + * Function to initialize all Soft Min/Max and Hard Min/Max to 0xff. * - * @param dpm_state - the address of the DPM Table to initiailize. - * @return None. + * @dpm_state: - the address of the DPM Table to initiailize. + * return: None. */ static void vega10_init_dpm_state(struct vega10_dpm_state *dpm_state) { @@ -1460,11 +1459,11 @@ static int vega10_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) } /* - * @fn vega10_populate_ulv_state - * @brief Function to provide parameters for Utral Low Voltage state to SMC. + * vega10_populate_ulv_state + * Function to provide parameters for Utral Low Voltage state to SMC. * - * @param hwmgr - the address of the hardware manager. - * @return Always 0. + * @hwmgr: - the address of the hardware manager. + * return: Always 0. */ static int vega10_populate_ulv_state(struct pp_hwmgr *hwmgr) { @@ -1545,13 +1544,12 @@ static int vega10_populate_smc_link_levels(struct pp_hwmgr *hwmgr) } /** -* Populates single SMC GFXSCLK structure using the provided engine clock -* -* @param hwmgr the address of the hardware manager -* @param gfx_clock the GFX clock to use to populate the structure. -* @param current_gfxclk_level location in PPTable for the SMC GFXCLK structure. -*/ - + * Populates single SMC GFXSCLK structure using the provided engine clock + * + * @hwmgr: the address of the hardware manager + * @gfx_clock: the GFX clock to use to populate the structure. + * @current_gfxclk_level: location in PPTable for the SMC GFXCLK structure. + */ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, uint32_t gfx_clock, PllSetting_t *current_gfxclk_level, uint32_t *acg_freq) @@ -1610,12 +1608,12 @@ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, } /** - * @brief Populates single SMC SOCCLK structure using the provided clock. + * Populates single SMC SOCCLK structure using the provided clock. * - * @param hwmgr - the address of the hardware manager. - * @param soc_clock - the SOC clock to use to populate the structure. - * @param current_socclk_level - location in PPTable for the SMC SOCCLK structure. - * @return 0 on success.. + * @hwmgr: the address of the hardware manager. + * @soc_clock: the SOC clock to use to populate the structure. + * @current_socclk_level: location in PPTable for the SMC SOCCLK structure. + * return: 0 on success */ static int vega10_populate_single_soc_level(struct pp_hwmgr *hwmgr, uint32_t soc_clock, uint8_t *current_soc_did, @@ -1659,10 +1657,10 @@ static int vega10_populate_single_soc_level(struct pp_hwmgr *hwmgr, } /** -* Populates all SMC SCLK levels' structure based on the trimmed allowed dpm engine clock states -* -* @param hwmgr the address of the hardware manager -*/ + * Populates all SMC SCLK levels' structure based on the trimmed allowed dpm engine clock states + * + * @hwmgr: the address of the hardware manager + */ static int vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) { struct vega10_hwmgr *data = hwmgr->backend; @@ -1747,11 +1745,11 @@ static void vega10_populate_vddc_soc_levels(struct pp_hwmgr *hwmgr) } /** - * @brief Populates single SMC GFXCLK structure using the provided clock. + * Populates single SMC GFXCLK structure using the provided clock. * - * @param hwmgr - the address of the hardware manager. - * @param mem_clock - the memory clock to use to populate the structure. - * @return 0 on success.. + * @hwmgr: the address of the hardware manager. + * @mem_clock: the memory clock to use to populate the structure. + * return: 0 on success.. */ static int vega10_populate_single_memory_level(struct pp_hwmgr *hwmgr, uint32_t mem_clock, uint8_t *current_mem_vid, @@ -1808,10 +1806,10 @@ static int vega10_populate_single_memory_level(struct pp_hwmgr *hwmgr, } /** - * @brief Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. + * Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. * - * @param pHwMgr - the address of the hardware manager. - * @return PP_Result_OK on success. + * @hwmgr: the address of the hardware manager. + * return: PP_Result_OK on success. */ static int vega10_populate_all_memory_levels(struct pp_hwmgr *hwmgr) { @@ -2486,12 +2484,11 @@ static void vega10_check_dpm_table_updated(struct pp_hwmgr *hwmgr) } /** -* Initializes the SMC table and uploads it -* -* @param hwmgr the address of the powerplay hardware manager. -* @param pInput the pointer to input data (PowerState) -* @return always 0 -*/ + * Initializes the SMC table and uploads it + * + * @hwmgr: the address of the powerplay hardware manager. + * return: always 0 + */ static int vega10_init_smc_table(struct pp_hwmgr *hwmgr) { int result; @@ -2864,11 +2861,11 @@ static int vega10_stop_dpm(struct pp_hwmgr *hwmgr, uint32_t bitmap) } /** - * @brief Tell SMC to enabled the supported DPMs. + * Tell SMC to enabled the supported DPMs. * - * @param hwmgr - the address of the powerplay hardware manager. - * @Param bitmap - bitmap for the features to enabled. - * @return 0 on at least one DPM is successfully enabled. + * @hwmgr: the address of the powerplay hardware manager. + * @bitmap bitmap for the features to enabled. + * return: 0 on at least one DPM is successfully enabled. */ static int vega10_start_dpm(struct pp_hwmgr *hwmgr, uint32_t bitmap) {
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:5474:5: warning: no previous prototype for ‘vega10_hwmgr_init’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:551: warning: Function parameter or member 'hwmgr' not described in 'vega10_get_evv_voltages' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'hwmgr' not described in 'vega10_patch_with_vdd_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'voltage' not described in 'vega10_patch_with_vdd_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:609: warning: Function parameter or member 'leakage_table' not described in 'vega10_patch_with_vdd_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'hwmgr' not described in 'vega10_patch_lookup_table_with_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'lookup_table' not described in 'vega10_patch_lookup_table_with_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:637: warning: Function parameter or member 'leakage_table' not described in 'vega10_patch_lookup_table_with_leakage' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1013: warning: Function parameter or member 'hwmgr' not described in 'vega10_trim_voltage_table' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1013: warning: Function parameter or member 'vol_table' not described in 'vega10_trim_voltage_table' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1160: warning: Function parameter or member 'hwmgr' not described in 'vega10_construct_voltage_tables' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'hwmgr' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'gfx_clock' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'current_gfxclk_level' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1558: warning: Function parameter or member 'acg_freq' not described in 'vega10_populate_single_gfx_level' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1613: warning: Cannot understand * @brief Populates single SMC SOCCLK structure using the provided clock. drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1667: warning: Function parameter or member 'hwmgr' not described in 'vega10_populate_all_graphic_levels' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1750: warning: Cannot understand * @brief Populates single SMC GFXCLK structure using the provided clock. drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:1811: warning: Cannot understand * @brief Populates all SMC MCLK levels' structure based on the trimmed allowed dpm memory clock states. drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2496: warning: Function parameter or member 'hwmgr' not described in 'vega10_init_smc_table' drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:2867: warning: Cannot understand * @brief Tell SMC to enabled the supported DPMs. Cc: Evan Quan <evan.quan@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> --- .../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 133 +++++++++--------- 1 file changed, 65 insertions(+), 68 deletions(-)