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Thu, 28 Jan 2021 23:34:56 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:51f1:c468:a70b:7c09]) by smtp.gmail.com with ESMTPSA id p1sm7689980pfn.21.2021.01.28.23.34.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 23:34:56 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v4 6/8] drm/mediatek: add matrix bits private data for ccorr Date: Fri, 29 Jan 2021 15:34:34 +0800 Message-Id: <20210129073436.2429834-7-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.365.g02bc693789-goog In-Reply-To: <20210129073436.2429834-1-hsinyi@chromium.org> References: <20210129073436.2429834-1-hsinyi@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 29 Jan 2021 08:11:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yongqiang Niu matrix bits of mt8183 is 12 matrix bits of mt8192 is 13 Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang --- drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c index 0c68090eb1e92..1c7163a12f3b1 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c @@ -31,8 +31,10 @@ #define DISP_CCORR_COEF_3 0x008C #define DISP_CCORR_COEF_4 0x0090 +#define CCORR_MATRIX_BITS 12 + struct mtk_disp_ccorr_data { - u32 reserved; + u32 matrix_bits; }; /** @@ -116,6 +118,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state) uint16_t coeffs[9] = { 0 }; int i; struct cmdq_pkt *cmdq_pkt = NULL; + u32 matrix_bits; if (!blob) return; @@ -123,8 +126,16 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state) ctm = (struct drm_color_ctm *)blob->data; input = ctm->matrix; - for (i = 0; i < ARRAY_SIZE(coeffs); i++) + if (ccorr->data) + matrix_bits = ccorr->data->matrix_bits; + else + matrix_bits = CCORR_MATRIX_BITS; + + for (i = 0; i < ARRAY_SIZE(coeffs); i++) { coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]); + if (matrix_bits > CCORR_MATRIX_BITS) + coeffs[i] <<= (matrix_bits - CCORR_MATRIX_BITS); + } mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1], &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0); @@ -205,8 +216,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev) return 0; } +static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = { + .matrix_bits = CCORR_MATRIX_BITS, +}; + static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = { - { .compatible = "mediatek,mt8183-disp-ccorr"}, + { .compatible = "mediatek,mt8183-disp-ccorr", + .data = &mt8183_ccorr_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);