| Message ID | 20210506191451.77768-29-matthew.brost@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Basic GuC submission support in the i915 | expand |
On Thu, May 06, 2021 at 12:13:42PM -0700, Matthew Brost wrote: > From: Michal Wajdeczko <michal.wajdeczko@intel.com> > > CTB pool is now maintained internally by the GuC as part of its > "private data". No need to allocate separate buffer and pass it > to GuC as yet another ADS. > > GuC: 57.0.0 > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> > Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 12 ------------ > drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 12 +----------- > 2 files changed, 1 insertion(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > index 648e1767b17a..775f00d706fa 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c > @@ -25,8 +25,6 @@ > * +---------------------------------------+ > * | guc_clients_info | > * +---------------------------------------+ > - * | guc_ct_pool_entry[size] | > - * +---------------------------------------+ > * | padding | > * +---------------------------------------+ <== 4K aligned > * | private data | > @@ -39,7 +37,6 @@ struct __guc_ads_blob { > struct guc_policies policies; > struct guc_gt_system_info system_info; > struct guc_clients_info clients_info; > - struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE]; > } __packed; > > static u32 guc_ads_private_data_size(struct intel_guc *guc) > @@ -67,11 +64,6 @@ static void guc_policies_init(struct guc_policies *policies) > policies->is_valid = 1; > } > > -static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num) > -{ > - memset(pool, 0, num * sizeof(*pool)); > -} > - > static void guc_mapping_table_init(struct intel_gt *gt, > struct guc_gt_system_info *system_info) > { > @@ -157,11 +149,7 @@ static void __guc_ads_init(struct intel_guc *guc) > base = intel_guc_ggtt_offset(guc, guc->ads_vma); > > /* Clients info */ > - guc_ct_pool_entries_init(blob->ct_pool, ARRAY_SIZE(blob->ct_pool)); > - > blob->clients_info.clients_num = 1; > - blob->clients_info.ct_pool_addr = base + ptr_offset(blob, ct_pool); > - blob->clients_info.ct_pool_count = ARRAY_SIZE(blob->ct_pool); > > /* ADS */ > blob->ads.scheduler_policies = base + ptr_offset(blob, policies); > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h > index 95db4a7d3f4d..301b173a26bc 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h > @@ -269,19 +269,9 @@ struct guc_gt_system_info { > } __packed; > > /* Clients info */ > -struct guc_ct_pool_entry { > - struct guc_ct_buffer_desc desc; > - u32 reserved[7]; > -} __packed; > - > -#define GUC_CT_POOL_SIZE 2 > - > struct guc_clients_info { > u32 clients_num; > - u32 reserved0[13]; > - u32 ct_pool_addr; > - u32 ct_pool_count; > - u32 reserved[4]; > + u32 reserved[19]; > } __packed; > > /* GuC Additional Data Struct */ > -- > 2.28.0 >
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index 648e1767b17a..775f00d706fa 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -25,8 +25,6 @@ * +---------------------------------------+ * | guc_clients_info | * +---------------------------------------+ - * | guc_ct_pool_entry[size] | - * +---------------------------------------+ * | padding | * +---------------------------------------+ <== 4K aligned * | private data | @@ -39,7 +37,6 @@ struct __guc_ads_blob { struct guc_policies policies; struct guc_gt_system_info system_info; struct guc_clients_info clients_info; - struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE]; } __packed; static u32 guc_ads_private_data_size(struct intel_guc *guc) @@ -67,11 +64,6 @@ static void guc_policies_init(struct guc_policies *policies) policies->is_valid = 1; } -static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num) -{ - memset(pool, 0, num * sizeof(*pool)); -} - static void guc_mapping_table_init(struct intel_gt *gt, struct guc_gt_system_info *system_info) { @@ -157,11 +149,7 @@ static void __guc_ads_init(struct intel_guc *guc) base = intel_guc_ggtt_offset(guc, guc->ads_vma); /* Clients info */ - guc_ct_pool_entries_init(blob->ct_pool, ARRAY_SIZE(blob->ct_pool)); - blob->clients_info.clients_num = 1; - blob->clients_info.ct_pool_addr = base + ptr_offset(blob, ct_pool); - blob->clients_info.ct_pool_count = ARRAY_SIZE(blob->ct_pool); /* ADS */ blob->ads.scheduler_policies = base + ptr_offset(blob, policies); diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h index 95db4a7d3f4d..301b173a26bc 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h @@ -269,19 +269,9 @@ struct guc_gt_system_info { } __packed; /* Clients info */ -struct guc_ct_pool_entry { - struct guc_ct_buffer_desc desc; - u32 reserved[7]; -} __packed; - -#define GUC_CT_POOL_SIZE 2 - struct guc_clients_info { u32 clients_num; - u32 reserved0[13]; - u32 ct_pool_addr; - u32 ct_pool_count; - u32 reserved[4]; + u32 reserved[19]; } __packed; /* GuC Additional Data Struct */