diff mbox series

[RFC,v3,6/6] drm/amd/display: reformat YCbCr-RGB conversion matrix

Message ID 20210730204134.21769-7-harry.wentland@amd.com (mailing list archive)
State New, archived
Headers show
Series A drm_plane API to support HDR planes | expand

Commit Message

Harry Wentland July 30, 2021, 8:41 p.m. UTC
Show the CSC matrixes in a 4x3 format.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 28 +++++++++++++--------
 1 file changed, 18 insertions(+), 10 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
index 00fc81431b43..345b3956425a 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
@@ -55,22 +55,30 @@  struct dpp_input_csc_matrix {
 
 static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = {
 	{COLOR_SPACE_SRGB,
-		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
+		{0x2000,      0,      0,      0,
+		      0, 0x2000,      0,      0,
+		      0,      0, 0x2000,      0} },
 	{COLOR_SPACE_SRGB_LIMITED,
-		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
+		{0x2000,      0,      0,      0,
+		      0, 0x2000,      0,      0,
+		      0,      0, 0x2000,      0} },
 	{COLOR_SPACE_YCBCR601,
-		{0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
-						0, 0x2000, 0x38b4, 0xe3a6} },
+		{0x2cdd, 0x2000,      0, 0xe991,
+		 0xe926, 0x2000, 0xf4fd, 0x10ef,
+		      0, 0x2000, 0x38b4, 0xe3a6} },
 	{COLOR_SPACE_YCBCR601_LIMITED,
-		{0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108,
-						0, 0x2568, 0x40de, 0xdd3a} },
+		{0x3353, 0x2568,      0, 0xe400,
+		 0xe5dc, 0x2568, 0xf367, 0x1108,
+		      0, 0x2568, 0x40de, 0xdd3a} },
 	{COLOR_SPACE_YCBCR709,
-		{0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
-						0x2000, 0x3b61, 0xe24f} },
+		{0x3265, 0x2000,      0, 0xe6ce,
+		 0xf105, 0x2000, 0xfa01, 0xa7d,
+		      0, 0x2000, 0x3b61, 0xe24f} },
 
 	{COLOR_SPACE_YCBCR709_LIMITED,
-		{0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0,
-						0x2568, 0x43ee, 0xdbb2} }
+		{0x39a6, 0x2568,      0, 0xe0d6,
+		 0xeedd, 0x2568, 0xf925, 0x9a8,
+		      0, 0x2568, 0x43ee, 0xdbb2} }
 };
 
 struct dpp_grph_csc_adjustment {