From patchwork Wed Aug 11 01:16:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Brost X-Patchwork-Id: 12429709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FF78C4338F for ; Wed, 11 Aug 2021 01:16:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A14260EE9 for ; Wed, 11 Aug 2021 01:16:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3A14260EE9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C737D6E086; Wed, 11 Aug 2021 01:16:38 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 18A5A6E079 for ; Wed, 11 Aug 2021 01:16:31 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10072"; a="276064752" X-IronPort-AV: E=Sophos;i="5.84,311,1620716400"; d="scan'208";a="276064752" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2021 18:16:29 -0700 X-IronPort-AV: E=Sophos;i="5.84,311,1620716400"; d="scan'208";a="675603983" Received: from dut151-iclu.fm.intel.com ([10.105.23.69]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2021 18:16:28 -0700 From: Matthew Brost To: , Subject: [PATCH 6/9] drm/i915/guc: Do not clear enable during reset in an enable is inflight Date: Wed, 11 Aug 2021 01:16:19 +0000 Message-Id: <20210811011622.255784-7-matthew.brost@intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210811011622.255784-1-matthew.brost@intel.com> References: <20210811011622.255784-1-matthew.brost@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Do not clear enable during a context reset if a schedule enable is in flight. This can occur if the context reset during a request cancellation, clears the offending request, and then enables scheduling. Fixes: 62eaf0ae217d ("drm/i915/guc: Support request cancellation") Signed-off-by: Matthew Brost Cc: guc_state.lock, flags); + if (!context_pending_enable(ce)) + clr_context_enabled(ce); + spin_unlock_irqrestore(&ce->guc_state.lock, flags); rq = intel_context_find_active_request(ce); if (!rq) {