diff mbox series

[v2,1/5,RFC] iommu: Add a IOMMU_DEVONLY protection flag

Message ID 20211001143427.1564786-2-boris.brezillon@collabora.com (mailing list archive)
State New, archived
Headers show
Series drm/panfrost: Add extra GPU-usage flags | expand

Commit Message

Boris Brezillon Oct. 1, 2021, 2:34 p.m. UTC
The IOMMU_DEVONLY flag allows the caller to flag a mappings backed by
device-private buffers. That means other devices or CPUs are not
expected to access the physical memory region pointed by the mapping,
and the MMU driver can safely restrict the shareability domain to the
device itself.

Will be used by the ARM MMU driver to flag Mali mappings accessed only
by the GPU as Inner-shareable.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
---
 include/linux/iommu.h | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Alyssa Rosenzweig Oct. 1, 2021, 5:31 p.m. UTC | #1
> The IOMMU_DEVONLY flag allows the caller to flag a mappings backed by
> device-private buffers. That means other devices or CPUs are not
> expected to access the physical memory region pointed by the mapping,
> and the MMU driver can safely restrict the shareability domain to the
> device itself.
> 
> Will be used by the ARM MMU driver to flag Mali mappings accessed only
> by the GPU as Inner-shareable.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
>  include/linux/iommu.h | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index d2f3435e7d17..db14781b522f 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -31,6 +31,13 @@
>   * if the IOMMU page table format is equivalent.
>   */
>  #define IOMMU_PRIV	(1 << 5)
> +/*
> + * Mapping is only accessed by the device behind the iommu. That means other
> + * devices or CPUs are not expected to access this physical memory region,
> + * and the MMU driver can safely restrict the shareability domain to the
> + * device itself.
> + */
> +#define IOMMU_DEVONLY	(1 << 6)
>  
>  struct iommu_ops;
>  struct iommu_group;

This seems totally reasonable to me, but it is well-known that I'm not
on good terms with the iommu subsystem. Let's wait for Robin to NAK :-P
Joerg Roedel Oct. 18, 2021, 10:25 a.m. UTC | #2
On Fri, Oct 01, 2021 at 04:34:23PM +0200, Boris Brezillon wrote:
> +/*
> + * Mapping is only accessed by the device behind the iommu. That means other
> + * devices or CPUs are not expected to access this physical memory region,
> + * and the MMU driver can safely restrict the shareability domain to the
> + * device itself.
> + */
> +#define IOMMU_DEVONLY	(1 << 6)

I am not entirely happy with the name, how about

	IOMMU_DEV_PRIVATE?

PRIV would conflict with IOMMU_PRIV (which should probably also be
IOMMU_PRIVILEGED, but thats another problem).

Regards,

	Joerg
Boris Brezillon Oct. 18, 2021, 12:03 p.m. UTC | #3
Hello Joerg,

On Mon, 18 Oct 2021 12:25:38 +0200
Joerg Roedel <joro@8bytes.org> wrote:

> On Fri, Oct 01, 2021 at 04:34:23PM +0200, Boris Brezillon wrote:
> > +/*
> > + * Mapping is only accessed by the device behind the iommu. That means other
> > + * devices or CPUs are not expected to access this physical memory region,
> > + * and the MMU driver can safely restrict the shareability domain to the
> > + * device itself.
> > + */
> > +#define IOMMU_DEVONLY	(1 << 6)  
> 
> I am not entirely happy with the name, how about
> 
> 	IOMMU_DEV_PRIVATE?

Works for me.

> 
> PRIV would conflict with IOMMU_PRIV (which should probably also be
> IOMMU_PRIVILEGED, but thats another problem).

Yeah, IOMMU_PRIV is confusing. I thought I could use that flag before
realizing PRIV was for privileged not private, but I'll leave that to
someone else :-).

Regards,

Boris
diff mbox series

Patch

diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index d2f3435e7d17..db14781b522f 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -31,6 +31,13 @@ 
  * if the IOMMU page table format is equivalent.
  */
 #define IOMMU_PRIV	(1 << 5)
+/*
+ * Mapping is only accessed by the device behind the iommu. That means other
+ * devices or CPUs are not expected to access this physical memory region,
+ * and the MMU driver can safely restrict the shareability domain to the
+ * device itself.
+ */
+#define IOMMU_DEVONLY	(1 << 6)
 
 struct iommu_ops;
 struct iommu_group;