| Message ID | 20211019215843.42718-4-sigmaris@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/rockchip: support gamma control on RK3399 | expand |
On 2021-10-19 22:58, Hugh Cole-Baker wrote: > Define the memory region on RK3399 VOPs containing the gamma LUT at > base+0x2000. > > Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> > --- > > Changes from v1: no changes in this patch > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 3871c7fd83b0..9cbf6ccdd256 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 { > > vopl: vop@ff8f0000 { > compatible = "rockchip,rk3399-vop-lit"; > - reg = <0x0 0xff8f0000 0x0 0x3efc>; > + reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>; > interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > assigned-clock-rates = <400000000>, <100000000>; > @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 { > > vopb: vop@ff900000 { > compatible = "rockchip,rk3399-vop-big"; > - reg = <0x0 0xff900000 0x0 0x3efc>; > + reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>; Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU? Robin. > interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > assigned-clock-rates = <400000000>, <100000000>;
> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote: > > On 2021-10-19 22:58, Hugh Cole-Baker wrote: >> Define the memory region on RK3399 VOPs containing the gamma LUT at >> base+0x2000. >> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> >> --- >> Changes from v1: no changes in this patch >> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >> index 3871c7fd83b0..9cbf6ccdd256 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi >> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 { >> vopl: vop@ff8f0000 { >> compatible = "rockchip,rk3399-vop-lit"; >> - reg = <0x0 0xff8f0000 0x0 0x3efc>; >> + reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>; >> interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; >> assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; >> assigned-clock-rates = <400000000>, <100000000>; >> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 { >> vopb: vop@ff900000 { >> compatible = "rockchip,rk3399-vop-big"; >> - reg = <0x0 0xff900000 0x0 0x3efc>; >> + reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>; > > Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU? > > Robin. This should be OK, the other registers are in the range ff900000-ff902000, the gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm misreading the dts. >> interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; >> assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; >> assigned-clock-rates = <400000000>, <100000000>; br, Hugh.
On 2022-09-15 17:53, Hugh Cole-Baker wrote: > >> On 15 Sep 2022, at 15:40, Robin Murphy <robin.murphy@arm.com> wrote: >> >> On 2021-10-19 22:58, Hugh Cole-Baker wrote: >>> Define the memory region on RK3399 VOPs containing the gamma LUT at >>> base+0x2000. >>> Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> >>> --- >>> Changes from v1: no changes in this patch >>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> index 3871c7fd83b0..9cbf6ccdd256 100644 >>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi >>> @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 { >>> vopl: vop@ff8f0000 { >>> compatible = "rockchip,rk3399-vop-lit"; >>> - reg = <0x0 0xff8f0000 0x0 0x3efc>; >>> + reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>; >>> interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; >>> assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; >>> assigned-clock-rates = <400000000>, <100000000>; >>> @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 { >>> vopb: vop@ff900000 { >>> compatible = "rockchip,rk3399-vop-big"; >>> - reg = <0x0 0xff900000 0x0 0x3efc>; >>> + reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>; >> >> Doesn't the second range still need to be shorter than 0xf00 to avoid overlapping the IOMMU? >> >> Robin. > > This should be OK, the other registers are in the range ff900000-ff902000, the > gamma LUT occupies the range ff902000-ff903000, and then the IOMMU registers > begin at ff903f00. I don't see any overlaps with the IOMMU unless I'm > misreading the dts. Oh dear, you're quite right, apparently I can't add up in hex today. Sorry for the noise! Robin.
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 3871c7fd83b0..9cbf6ccdd256 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 { vopl: vop@ff8f0000 { compatible = "rockchip,rk3399-vop-lit"; - reg = <0x0 0xff8f0000 0x0 0x3efc>; + reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; assigned-clock-rates = <400000000>, <100000000>; @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 { vopb: vop@ff900000 { compatible = "rockchip,rk3399-vop-big"; - reg = <0x0 0xff900000 0x0 0x3efc>; + reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; assigned-clock-rates = <400000000>, <100000000>;
Define the memory region on RK3399 VOPs containing the gamma LUT at base+0x2000. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> --- Changes from v1: no changes in this patch arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)