| Message ID | 20211022164847.2632366-1-matthew.auld@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915/gtt: flush the scratch page | expand |
On 10/22/21 18:48, Matthew Auld wrote: > The scratch page is directly visible in the users address space, and > while this is forced as CACHE_LLC, by the kernel, we still have to > contend with things like "Bypass-LLC" MOCS. So just flush no matter > what. > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Ramalingam C <ramalingam.c@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_gtt.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c > index 67d14afa6623..b6c088423319 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c > @@ -273,6 +273,7 @@ static void poison_scratch_page(struct drm_i915_gem_object *scratch) > val = POISON_FREE; > > memset(vaddr, val, scratch->base.size); > + clflush_cache_range(vaddr, scratch->base.size); > } > > int setup_scratch_page(struct i915_address_space *vm)
On 10/22/21 18:48, Matthew Auld wrote: > The scratch page is directly visible in the users address space, and > while this is forced as CACHE_LLC, by the kernel, we still have to > contend with things like "Bypass-LLC" MOCS. So just flush no matter > what. > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Ramalingam C <ramalingam.c@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_gtt.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c > index 67d14afa6623..b6c088423319 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c > @@ -273,6 +273,7 @@ static void poison_scratch_page(struct drm_i915_gem_object *scratch) > val = POISON_FREE; > > memset(vaddr, val, scratch->base.size); > + clflush_cache_range(vaddr, scratch->base.size); Actually, we should probably use drm_clflush_virt_range() here? /Thomas > } > > int setup_scratch_page(struct i915_address_space *vm)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c index 67d14afa6623..b6c088423319 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.c +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c @@ -273,6 +273,7 @@ static void poison_scratch_page(struct drm_i915_gem_object *scratch) val = POISON_FREE; memset(vaddr, val, scratch->base.size); + clflush_cache_range(vaddr, scratch->base.size); } int setup_scratch_page(struct i915_address_space *vm)
The scratch page is directly visible in the users address space, and while this is forced as CACHE_LLC, by the kernel, we still have to contend with things like "Bypass-LLC" MOCS. So just flush no matter what. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ramalingam C <ramalingam.c@intel.com> --- drivers/gpu/drm/i915/gt/intel_gtt.c | 1 + 1 file changed, 1 insertion(+)