Message ID | 20211026052916.8222-2-jason-jh.lin@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | CMDQ refinement of Mediatek DRM driver | expand |
Hi, Jason: jason-jh.lin <jason-jh.lin@mediatek.com> 於 2021年10月26日 週二 下午1:29寫道: > > From: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > rx_callback is a standard mailbox callback mechanism and could cover the > function of proprietary cmdq_task_cb, so use the standard one instead of > the proprietary one. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 16 +++++++++++++--- > 1 file changed, 13 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > index a4e80e499674..369d3e68c0b6 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > @@ -4,6 +4,8 @@ > */ > > #include <linux/clk.h> > +#include <linux/dma-mapping.h> > +#include <linux/mailbox_controller.h> > #include <linux/pm_runtime.h> > #include <linux/soc/mediatek/mtk-cmdq.h> > #include <linux/soc/mediatek/mtk-mmsys.h> > @@ -222,9 +224,11 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc, > } > > #if IS_REACHABLE(CONFIG_MTK_CMDQ) > -static void ddp_cmdq_cb(struct cmdq_cb_data data) > +static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) > { > - cmdq_pkt_destroy(data.data); > + struct cmdq_cb_data *data = mssg; > + > + cmdq_pkt_destroy(data->pkt); > } > #endif > > @@ -475,7 +479,12 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc, > cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false); > mtk_crtc_ddp_config(crtc, cmdq_handle); > cmdq_pkt_finalize(cmdq_handle); > - cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle); > + dma_sync_single_for_device(mtk_crtc->cmdq_client->chan->mbox->dev, > + cmdq_handle->pa_base, > + cmdq_handle->cmd_buf_size, > + DMA_TO_DEVICE); > + mbox_send_message(mtk_crtc->cmdq_client->chan, cmdq_handle); > + mbox_client_txdone(mtk_crtc->cmdq_client->chan, 0); > } > #endif > mtk_crtc->config_updating = false; > @@ -839,6 +848,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, > } > > if (mtk_crtc->cmdq_client) { > + mtk_crtc->cmdq_client->client.rx_callback = ddp_cmdq_cb; > ret = of_property_read_u32_index(priv->mutex_node, > "mediatek,gce-events", > drm_crtc_index(&mtk_crtc->base), > -- > 2.18.0 >
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index a4e80e499674..369d3e68c0b6 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -4,6 +4,8 @@ */ #include <linux/clk.h> +#include <linux/dma-mapping.h> +#include <linux/mailbox_controller.h> #include <linux/pm_runtime.h> #include <linux/soc/mediatek/mtk-cmdq.h> #include <linux/soc/mediatek/mtk-mmsys.h> @@ -222,9 +224,11 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc, } #if IS_REACHABLE(CONFIG_MTK_CMDQ) -static void ddp_cmdq_cb(struct cmdq_cb_data data) +static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) { - cmdq_pkt_destroy(data.data); + struct cmdq_cb_data *data = mssg; + + cmdq_pkt_destroy(data->pkt); } #endif @@ -475,7 +479,12 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc, cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false); mtk_crtc_ddp_config(crtc, cmdq_handle); cmdq_pkt_finalize(cmdq_handle); - cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle); + dma_sync_single_for_device(mtk_crtc->cmdq_client->chan->mbox->dev, + cmdq_handle->pa_base, + cmdq_handle->cmd_buf_size, + DMA_TO_DEVICE); + mbox_send_message(mtk_crtc->cmdq_client->chan, cmdq_handle); + mbox_client_txdone(mtk_crtc->cmdq_client->chan, 0); } #endif mtk_crtc->config_updating = false; @@ -839,6 +848,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, } if (mtk_crtc->cmdq_client) { + mtk_crtc->cmdq_client->client.rx_callback = ddp_cmdq_cb; ret = of_property_read_u32_index(priv->mutex_node, "mediatek,gce-events", drm_crtc_index(&mtk_crtc->base),