From patchwork Wed Oct 27 21:23:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12588585 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABE6CC4332F for ; Wed, 27 Oct 2021 21:21:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7F205610CA for ; Wed, 27 Oct 2021 21:21:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7F205610CA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 142F66E915; Wed, 27 Oct 2021 21:21:33 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F8846E91A; Wed, 27 Oct 2021 21:21:23 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10150"; a="229020888" X-IronPort-AV: E=Sophos;i="5.87,187,1631602800"; d="scan'208";a="229020888" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2021 14:21:23 -0700 X-IronPort-AV: E=Sophos;i="5.87,187,1631602800"; d="scan'208";a="665154243" Received: from ramaling-i9x.iind.intel.com ([10.99.66.205]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2021 14:21:20 -0700 From: Ramalingam C To: dri-devel , intel-gfx Cc: Daniel Vetter , Matthew Auld , Hellstrom Thomas , Joonas Lahtinen , Ramalingam C Subject: [PATCH v3 11/17] drm/i915/dg2: Prune the Y Tiling modifiers Date: Thu, 28 Oct 2021 02:53:33 +0530 Message-Id: <20211027212339.29259-12-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211027212339.29259-1-ramalingam.c@intel.com> References: <20211027212339.29259-1-ramalingam.c@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove the Y Tiling modifiers for DG2. Signed-off-by: Ramalingam C Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_fb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c index 9ce1d273dc7e..9ff52dde1683 100644 --- a/drivers/gpu/drm/i915/display/intel_fb.c +++ b/drivers/gpu/drm/i915/display/intel_fb.c @@ -315,6 +315,9 @@ static bool plane_has_modifier(struct drm_i915_private *i915, if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until)) return false; + if (IS_DG2(i915) && md->tiling == I915_TILING_Y) + return false; + if (!md->is_linear && !(plane_caps & PLANE_HAS_TILING)) return false;