diff mbox series

drm/i915/guc/slpc: Check GuC status before freq boost

Message ID 20211112071016.9640-1-vinay.belgaumkar@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/guc/slpc: Check GuC status before freq boost | expand

Commit Message

Vinay Belgaumkar Nov. 12, 2021, 7:10 a.m. UTC
It's possible that i915 might get wedged between a boost
and un-boost. Validate the i915-GuC connection before trying
to send a H2G to change the min frequency.

Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/4464

Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Ashutosh Dixit Nov. 12, 2021, 4:05 p.m. UTC | #1
On Thu, 11 Nov 2021 23:10:16 -0800, Vinay Belgaumkar wrote:
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 4e1d3cd29164..22c1c12369f2 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -183,11 +183,15 @@ static int slpc_unset_param(struct intel_guc_slpc *slpc,
>  static int slpc_force_min_freq(struct intel_guc_slpc *slpc, u32 freq)
>  {
>	struct drm_i915_private *i915 = slpc_to_i915(slpc);
> +	struct intel_guc *guc = slpc_to_guc(slpc);
>	intel_wakeref_t wakeref;
>	int ret = 0;
>
>	lockdep_assert_held(&slpc->lock);
>
> +	if (!intel_guc_is_ready(guc))
> +		return -ENODEV;
> +

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

The test wedges/resets the GPU after a request is queued but before it is
retired.
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index 4e1d3cd29164..22c1c12369f2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
@@ -183,11 +183,15 @@  static int slpc_unset_param(struct intel_guc_slpc *slpc,
 static int slpc_force_min_freq(struct intel_guc_slpc *slpc, u32 freq)
 {
 	struct drm_i915_private *i915 = slpc_to_i915(slpc);
+	struct intel_guc *guc = slpc_to_guc(slpc);
 	intel_wakeref_t wakeref;
 	int ret = 0;
 
 	lockdep_assert_held(&slpc->lock);
 
+	if (!intel_guc_is_ready(guc))
+		return -ENODEV;
+
 	/*
 	 * This function is a little different as compared to
 	 * intel_guc_slpc_set_min_freq(). Softlimit will not be updated