From patchwork Sun Dec 12 15:13:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 12672373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E27C2C433F5 for ; Sun, 12 Dec 2021 15:13:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A07210F596; Sun, 12 Dec 2021 15:13:32 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 04FA110F597; Sun, 12 Dec 2021 15:13:30 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10195"; a="301993386" X-IronPort-AV: E=Sophos;i="5.88,200,1635231600"; d="scan'208";a="301993386" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2021 07:13:29 -0800 X-IronPort-AV: E=Sophos;i="5.88,200,1635231600"; d="scan'208";a="517444539" Received: from nipunpan-mobl1.ger.corp.intel.com (HELO intel.com) ([10.252.53.91]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2021 07:13:25 -0800 From: Andi Shyti To: Intel GFX , DRI Devel Subject: [PATCH v7 10/12] drm/i915: Rename i915->gt to i915->gt0 Date: Sun, 12 Dec 2021 17:13:21 +0200 Message-Id: <20211212151321.118168-1-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Micha=C5=82_Winiarski?= , Andi Shyti , Lucas De Marchi , Chris Wilson , Andi Shyti Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In preparation of the multitile support, highlight the root GT by calling it gt0 inside the drm i915 private data. Signed-off-by: Andi Shyti Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Lucas De Marchi Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 902bb89f628f..059642738f6c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1005,7 +1005,7 @@ struct drm_i915_private { struct i915_perf perf; /* Abstract the submission mechanism (legacy ringbuffer or execlists) away */ - struct intel_gt gt; + struct intel_gt gt0; struct { struct i915_gem_contexts { @@ -1079,7 +1079,7 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) static inline struct intel_gt *to_gt(struct drm_i915_private *i915) { - return &i915->gt; + return &i915->gt0; } /* Simple iterator over all initialised engines */