diff mbox series

drm/amdgpu: Wrong order for config and counter_id parameters

Message ID 20220126091602.1647-1-jinsdb@126.com (mailing list archive)
State New, archived
Headers show
Series drm/amdgpu: Wrong order for config and counter_id parameters | expand

Commit Message

Qu Huang Jan. 26, 2022, 9:16 a.m. UTC
From: huangqu <jinsdb@126.com>

Wrong order for config and counter_id parameters was passed, when calling df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.

Signed-off-by: huangqu <jinsdb@126.com>
---
 drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

--
2.31.1

Comments

Alex Deucher Jan. 27, 2022, 8:16 p.m. UTC | #1
Applied.  Thanks!

Alex

On Wed, Jan 26, 2022 at 4:48 AM <jinsdb@126.com> wrote:
>
> From: huangqu <jinsdb@126.com>
>
> Wrong order for config and counter_id parameters was passed, when calling df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.
>
> Signed-off-by: huangqu <jinsdb@126.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
> index 43c5e3ec9..f4dfca013 100644
> --- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
> +++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
> @@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,
>
>  #define DEFERRED_ARM_MASK      (1 << 31)
>  static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
> -                                   int counter_idx, uint64_t config,
> +                                   uint64_t config, int counter_idx,
>                                     bool is_deferred)
>  {
>
> @@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
>  }
>
>  static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
> -                                   int counter_idx,
> -                                   uint64_t config)
> +                                   uint64_t config,
> +                                   int counter_idx)
>  {
>         return  (df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
>                         (adev->df_perfmon_config_assign_mask[counter_idx]
> --
> 2.31.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
index 43c5e3ec9..f4dfca013 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
@@ -458,7 +458,7 @@  static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,

 #define DEFERRED_ARM_MASK	(1 << 31)
 static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
-				    int counter_idx, uint64_t config,
+				    uint64_t config, int counter_idx,
 				    bool is_deferred)
 {

@@ -476,8 +476,8 @@  static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
 }

 static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
-				    int counter_idx,
-				    uint64_t config)
+				    uint64_t config,
+				    int counter_idx)
 {
 	return	(df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
 			(adev->df_perfmon_config_assign_mask[counter_idx]