From patchwork Fri Jan 28 18:52:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12728951 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95972C433F5 for ; Fri, 28 Jan 2022 18:52:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B7C310E818; Fri, 28 Jan 2022 18:52:30 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 028C310E76F; Fri, 28 Jan 2022 18:52:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643395938; x=1674931938; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PS1m/23XRkcfXAhz6RTQAnh4TmNL9PFELEsRwE9opwc=; b=RAB2GBNZtWqLCIFi+z3GhEtlrze9B3uKQ9if2rj8CtqYM3903/m723Dx LeOS8Xc7cgtSQIZXZCpE7bv7fTGqimsCgh/yLXAxQ9XyoEh3A/1kamJmm ChRv0gkiSzjymB9qjUconQWPhuRZg5f6WeIfH7W4Yqski0qiLZ3DydPMT Okr6mL2Bca91gVlFsPNqzJmegOOT6GvrDED8i8enHpsznoqWZIDyIuWRZ ZLKp3yUGgMb33Lc2hkHcNfiLNIp65UxpG6zsB0zWU4n/5n9HMYJlLgWdo LUX361VG4s/R3wwujgXG1eD/sumKBdXtWZihWLsjifanCHpYcQm+D70PB g==; X-IronPort-AV: E=McAfee;i="6200,9189,10240"; a="310490208" X-IronPort-AV: E=Sophos;i="5.88,324,1635231600"; d="scan'208";a="310490208" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2022 10:52:17 -0800 X-IronPort-AV: E=Sophos;i="5.88,324,1635231600"; d="scan'208";a="625718077" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2022 10:52:14 -0800 From: Ramalingam C To: intel-gfx , dri-devel Subject: [PATCH 4/5] drm/i915/dg2: Add Wa_22011100796 Date: Sat, 29 Jan 2022 00:22:08 +0530 Message-Id: <20220128185209.18077-5-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220128185209.18077-1-ramalingam.c@intel.com> References: <20220128185209.18077-1-ramalingam.c@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld , Rodrigo Vivi , Bruce Chang Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Bruce Chang Whenever Full soft reset is required, reset all individual engines first, and then do a full soft reset. Signed-off-by: Bruce Chang cc: Matt Roper Cc: Rodrigo Vivi Signed-off-by: Ramalingam C Acked-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_reset.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c index 6f2821cca409..5fae56b89319 100644 --- a/drivers/gpu/drm/i915/gt/intel_reset.c +++ b/drivers/gpu/drm/i915/gt/intel_reset.c @@ -600,6 +600,15 @@ static int gen8_reset_engines(struct intel_gt *gt, */ } + /* + * Wa_22011100796:dg2, whenever Full soft reset is required, + * reset all individual engines firstly, and then do a full soft reset. + * + * This is best effort, so ignore any error from the initial reset. + */ + if (IS_DG2(gt->i915) && engine_mask == ALL_ENGINES) + gen11_reset_engines(gt, gt->info.engine_mask, 0); + if (GRAPHICS_VER(gt->i915) >= 11) ret = gen11_reset_engines(gt, engine_mask, retry); else