| Message ID | 20220217002530.396563-4-marex@denx.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: bridge: icn6211: Fix hard-coded panel settings and add I2C support | expand |
On Thu, Feb 17, 2022 at 01:25:21AM +0100, Marek Vasut wrote: > The driver currently hard-codes HS/VS polarity to active-low and DE to > active-high, which is not correct for a lot of supported DPI panels. > Add the missing mode flag handling for HS/VS/DE polarity. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Jagan Teki <jagan@amarulasolutions.com> > Cc: Maxime Ripard <maxime@cerno.tech> > Cc: Robert Foss <robert.foss@linaro.org> > Cc: Sam Ravnborg <sam@ravnborg.org> > Cc: Thomas Zimmermann <tzimmermann@suse.de> > To: dri-devel@lists.freedesktop.org > --- > V2: Rebase on next-20220214 > --- > drivers/gpu/drm/bridge/chipone-icn6211.c | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c > index e29e6a84c39a6..2ac8eb7e25f52 100644 > --- a/drivers/gpu/drm/bridge/chipone-icn6211.c > +++ b/drivers/gpu/drm/bridge/chipone-icn6211.c > @@ -165,8 +165,16 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, > struct drm_bridge_state *old_bridge_state) > { > struct chipone *icn = bridge_to_chipone(bridge); > + struct drm_atomic_state *state = old_bridge_state->base.state; > struct drm_display_mode *mode = &icn->mode; > + const struct drm_bridge_state *bridge_state; > u16 hfp, hbp, hsync; > + u32 bus_flags; > + u8 pol; > + > + /* Get the DPI flags from the bridge state. */ > + bridge_state = drm_atomic_get_new_bridge_state(state, bridge); > + bus_flags = bridge_state->output_bus_cfg.flags; > > ICN6211_DSI(icn, MIPI_CFG_PW, MIPI_CFG_PW_CONFIG_DSI); > > @@ -206,7 +214,13 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, > ICN6211_DSI(icn, HFP_MIN, hfp & 0xff); > ICN6211_DSI(icn, MIPI_PD_CK_LANE, 0xa0); > ICN6211_DSI(icn, PLL_CTRL(12), 0xff); > - ICN6211_DSI(icn, BIST_POL, BIST_POL_DE_POL); > + > + /* DPI HS/VS/DE polarity */ > + pol = ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? BIST_POL_HSYNC_POL : 0) | > + ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? BIST_POL_VSYNC_POL : 0) | > + ((bus_flags & DRM_BUS_FLAG_DE_HIGH) ? BIST_POL_DE_POL : 0); Is there a reason you didn't use bus_flags for all the polarities there? Maxime
On 3/2/22 10:59, Maxime Ripard wrote: > On Thu, Feb 17, 2022 at 01:25:21AM +0100, Marek Vasut wrote: >> The driver currently hard-codes HS/VS polarity to active-low and DE to >> active-high, which is not correct for a lot of supported DPI panels. >> Add the missing mode flag handling for HS/VS/DE polarity. >> >> Signed-off-by: Marek Vasut <marex@denx.de> >> Cc: Jagan Teki <jagan@amarulasolutions.com> >> Cc: Maxime Ripard <maxime@cerno.tech> >> Cc: Robert Foss <robert.foss@linaro.org> >> Cc: Sam Ravnborg <sam@ravnborg.org> >> Cc: Thomas Zimmermann <tzimmermann@suse.de> >> To: dri-devel@lists.freedesktop.org >> --- >> V2: Rebase on next-20220214 >> --- >> drivers/gpu/drm/bridge/chipone-icn6211.c | 16 +++++++++++++++- >> 1 file changed, 15 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c >> index e29e6a84c39a6..2ac8eb7e25f52 100644 >> --- a/drivers/gpu/drm/bridge/chipone-icn6211.c >> +++ b/drivers/gpu/drm/bridge/chipone-icn6211.c >> @@ -165,8 +165,16 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, >> struct drm_bridge_state *old_bridge_state) >> { >> struct chipone *icn = bridge_to_chipone(bridge); >> + struct drm_atomic_state *state = old_bridge_state->base.state; >> struct drm_display_mode *mode = &icn->mode; >> + const struct drm_bridge_state *bridge_state; >> u16 hfp, hbp, hsync; >> + u32 bus_flags; >> + u8 pol; >> + >> + /* Get the DPI flags from the bridge state. */ >> + bridge_state = drm_atomic_get_new_bridge_state(state, bridge); >> + bus_flags = bridge_state->output_bus_cfg.flags; >> >> ICN6211_DSI(icn, MIPI_CFG_PW, MIPI_CFG_PW_CONFIG_DSI); >> >> @@ -206,7 +214,13 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, >> ICN6211_DSI(icn, HFP_MIN, hfp & 0xff); >> ICN6211_DSI(icn, MIPI_PD_CK_LANE, 0xa0); >> ICN6211_DSI(icn, PLL_CTRL(12), 0xff); >> - ICN6211_DSI(icn, BIST_POL, BIST_POL_DE_POL); >> + >> + /* DPI HS/VS/DE polarity */ >> + pol = ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? BIST_POL_HSYNC_POL : 0) | >> + ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? BIST_POL_VSYNC_POL : 0) | >> + ((bus_flags & DRM_BUS_FLAG_DE_HIGH) ? BIST_POL_DE_POL : 0); > > Is there a reason you didn't use bus_flags for all the polarities there? Because there is no separate HS/VS bus flag, that's why HS/VS is pulled from mode flags.
diff --git a/drivers/gpu/drm/bridge/chipone-icn6211.c b/drivers/gpu/drm/bridge/chipone-icn6211.c index e29e6a84c39a6..2ac8eb7e25f52 100644 --- a/drivers/gpu/drm/bridge/chipone-icn6211.c +++ b/drivers/gpu/drm/bridge/chipone-icn6211.c @@ -165,8 +165,16 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { struct chipone *icn = bridge_to_chipone(bridge); + struct drm_atomic_state *state = old_bridge_state->base.state; struct drm_display_mode *mode = &icn->mode; + const struct drm_bridge_state *bridge_state; u16 hfp, hbp, hsync; + u32 bus_flags; + u8 pol; + + /* Get the DPI flags from the bridge state. */ + bridge_state = drm_atomic_get_new_bridge_state(state, bridge); + bus_flags = bridge_state->output_bus_cfg.flags; ICN6211_DSI(icn, MIPI_CFG_PW, MIPI_CFG_PW_CONFIG_DSI); @@ -206,7 +214,13 @@ static void chipone_atomic_enable(struct drm_bridge *bridge, ICN6211_DSI(icn, HFP_MIN, hfp & 0xff); ICN6211_DSI(icn, MIPI_PD_CK_LANE, 0xa0); ICN6211_DSI(icn, PLL_CTRL(12), 0xff); - ICN6211_DSI(icn, BIST_POL, BIST_POL_DE_POL); + + /* DPI HS/VS/DE polarity */ + pol = ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? BIST_POL_HSYNC_POL : 0) | + ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? BIST_POL_VSYNC_POL : 0) | + ((bus_flags & DRM_BUS_FLAG_DE_HIGH) ? BIST_POL_DE_POL : 0); + ICN6211_DSI(icn, BIST_POL, pol); + ICN6211_DSI(icn, PLL_CTRL(6), PLL_CTRL_6_MIPI_CLK); ICN6211_DSI(icn, PLL_REF_DIV, 0x71); ICN6211_DSI(icn, PLL_INT(0), 0x2b);
The driver currently hard-codes HS/VS polarity to active-low and DE to active-high, which is not correct for a lot of supported DPI panels. Add the missing mode flag handling for HS/VS/DE polarity. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Maxime Ripard <maxime@cerno.tech> Cc: Robert Foss <robert.foss@linaro.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> To: dri-devel@lists.freedesktop.org --- V2: Rebase on next-20220214 --- drivers/gpu/drm/bridge/chipone-icn6211.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)