From patchwork Fri Feb 18 14:54:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guillaume Ranquet X-Patchwork-Id: 12751503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD270C433FE for ; Fri, 18 Feb 2022 14:56:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E035B10ED46; Fri, 18 Feb 2022 14:56:56 +0000 (UTC) Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by gabe.freedesktop.org (Postfix) with ESMTPS id 24F2C10ED02 for ; Fri, 18 Feb 2022 14:56:34 +0000 (UTC) Received: by mail-wm1-x336.google.com with SMTP id o34so5428505wms.1 for ; Fri, 18 Feb 2022 06:56:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7H4qXnTXW08RnaMU6nHzYQDDgNK890kQnNZHO+wv8Is=; b=GbL9EOhgOCg+DlOkGcN01lp2uIBQiOJ++mt534W/MQIpzAOw9Dt7JC5h5y3Avtf1gq 9/OlETR1IwJ3flgAwzPQJmqVpacPVhYuDjniJoQzkv4LU0+cY7lURCGjfnsdMtpbibfr 0V+HMtN/qfO9VesRTJ9agOihdUpTA84TS/KgFc5uqprMm/WDxzWTiMYVxpXA6dHCaPCk EHdeXGC42f5/vWiMPO+hh2+l28UkFjIYUeCrZAYrtdCwoWZfVnnFY3HiNyl/0rxb+fOC gr7+2YKVIwShDqOFDQXrav/awPMS8RhM3ob473UmS0DKTYFisimPVaYWKIYRExf5FkbO WqlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7H4qXnTXW08RnaMU6nHzYQDDgNK890kQnNZHO+wv8Is=; b=Sy+omhFOJKyc1Ri2mZfcUVZxJbL5BcqU0dNjJI+tv7r61TXeWt1RnxgHuWvuaz0ESf jmGx4ptsaj6j82gSfL2Z0APdA9tLl38UBxH5dm+Tpierlbe7N2dRDyruB29OSiUpQNpC sZzNJC1gbnu4qImKBYMcrcEZoDPmStygOZDh6lHJkSV+uYjBgIxOosZxYKYhGOeRL+uq l8CX/dRouXz4BH0TMfDKNPwPn0ln3ckVv6Nv2RiM+o5AjEOpXBhbnKtE7KDZRJkSO00T 9PuhnRsiALGizO6Yvl7HQFC+PV+APjnYjJsWa2JkCnydJ9dIljcLajP9tycHN1rqxVAm 1h7A== X-Gm-Message-State: AOAM532Ca5ECN/wuHtp+w0xUzSfFXDqdLQRrjUHwmwd85Ct3oH5wEYI7 zb3S0JpIx3nhxu5ViczbBsLw7Q== X-Google-Smtp-Source: ABdhPJxPvf8xrJg8I6LH2cnRlqNzZBlpAwtBJFRtBVDCKJxb59B/hVg/UcpgNkvvBHj0WWgcw/8y8w== X-Received: by 2002:a05:600c:4f4f:b0:37b:d847:ef15 with SMTP id m15-20020a05600c4f4f00b0037bd847ef15mr10699463wmq.130.1645196192675; Fri, 18 Feb 2022 06:56:32 -0800 (PST) Received: from localhost.localdomain (2a02-8440-6241-3b28-3074-96af-9642-0002.rev.sfr.net. [2a02:8440:6241:3b28:3074:96af:9642:2]) by smtp.gmail.com with ESMTPSA id b10sm47431454wrd.8.2022.02.18.06.56.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Feb 2022 06:56:32 -0800 (PST) From: Guillaume Ranquet To: chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, matthias.bgg@gmail.com, chunfeng.yun@mediatek.com, kishon@ti.com, vkoul@kernel.org, deller@gmx.de, ck.hu@mediatek.com, jitao.shi@mediatek.com, angelogioacchino.delregno@collabora.com Subject: [PATCH v8 16/19] drm/mediatek: Add mt8195 External DisplayPort support Date: Fri, 18 Feb 2022 15:54:34 +0100 Message-Id: <20220218145437.18563-17-granquet@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220218145437.18563-1-granquet@baylibre.com> References: <20220218145437.18563-1-granquet@baylibre.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patch adds External DisplayPort support to the mt8195 eDP driver. Signed-off-by: Guillaume Ranquet --- drivers/gpu/drm/mediatek/mtk_dp.c | 87 +++++++++++++++++++++++-------- 1 file changed, 64 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 5b60293ecc0d3..2a3d5f15b651b 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -188,6 +188,11 @@ static struct regmap_config mtk_dp_regmap_config = { .name = "mtk-dp-registers", }; +static bool mtk_dp_is_edp(struct mtk_dp *mtk_dp) +{ + return mtk_dp->next_bridge; +} + static struct mtk_dp *mtk_dp_from_bridge(struct drm_bridge *b) { return container_of(b, struct mtk_dp, bridge); @@ -888,26 +893,49 @@ static int mtk_dp_get_calibration_data(struct mtk_dp *mtk_dp) return PTR_ERR(buf); } - cal_data->glb_bias_trim = - check_cal_data_valid(1, 0x1e, (buf[3] >> 27) & 0x1f, 0xf); - cal_data->clktx_impse = - check_cal_data_valid(1, 0xe, (buf[0] >> 9) & 0xf, 0x8); - cal_data->ln0_tx_impsel_pmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 28) & 0xf, 0x8); - cal_data->ln0_tx_impsel_nmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 24) & 0xf, 0x8); - cal_data->ln1_tx_impsel_pmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 20) & 0xf, 0x8); - cal_data->ln1_tx_impsel_nmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 16) & 0xf, 0x8); - cal_data->ln2_tx_impsel_pmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 12) & 0xf, 0x8); - cal_data->ln2_tx_impsel_nmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 8) & 0xf, 0x8); - cal_data->ln3_tx_impsel_pmos = - check_cal_data_valid(1, 0xe, (buf[2] >> 4) & 0xf, 0x8); - cal_data->ln3_tx_impsel_nmos = - check_cal_data_valid(1, 0xe, buf[2] & 0xf, 0x8); + if (mtk_dp_is_edp(mtk_dp)) { + cal_data->glb_bias_trim = + check_cal_data_valid(1, 0x1e, (buf[3] >> 27) & 0x1f, 0xf); + cal_data->clktx_impse = + check_cal_data_valid(1, 0xe, (buf[0] >> 9) & 0xf, 0x8); + cal_data->ln0_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 28) & 0xf, 0x8); + cal_data->ln0_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 24) & 0xf, 0x8); + cal_data->ln1_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 20) & 0xf, 0x8); + cal_data->ln1_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 16) & 0xf, 0x8); + cal_data->ln2_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 12) & 0xf, 0x8); + cal_data->ln2_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 8) & 0xf, 0x8); + cal_data->ln3_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[2] >> 4) & 0xf, 0x8); + cal_data->ln3_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, buf[2] & 0xf, 0x8); + } else { + cal_data->glb_bias_trim = + check_cal_data_valid(1, 0x1e, (buf[0] >> 27) & 0x1f, 0xf); + cal_data->clktx_impse = + check_cal_data_valid(1, 0xe, (buf[0] >> 13) & 0xf, 0x8); + cal_data->ln0_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 28) & 0xf, 0x8); + cal_data->ln0_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 24) & 0xf, 0x8); + cal_data->ln1_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 20) & 0xf, 0x8); + cal_data->ln1_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 16) & 0xf, 0x8); + cal_data->ln2_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 12) & 0xf, 0x8); + cal_data->ln2_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 8) & 0xf, 0x8); + cal_data->ln3_tx_impsel_pmos = + check_cal_data_valid(1, 0xe, (buf[1] >> 4) & 0xf, 0x8); + cal_data->ln3_tx_impsel_nmos = + check_cal_data_valid(1, 0xe, buf[1] & 0xf, 0x8); + } kfree(buf); @@ -1026,7 +1054,10 @@ static void mtk_dp_video_mute(struct mtk_dp *mtk_dp, bool enable) VIDEO_MUTE_SEL_DP_ENC0_P0_MASK | VIDEO_MUTE_SW_DP_ENC0_P0_MASK); - mtk_dp_sip_atf_call(MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE, enable); + if (mtk_dp_is_edp(mtk_dp)) + mtk_dp_sip_atf_call(MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE, enable); + else + mtk_dp_sip_atf_call(MTK_DP_SIP_ATF_VIDEO_UNMUTE, enable); } static void mtk_dp_power_enable(struct mtk_dp *mtk_dp) @@ -2228,7 +2259,11 @@ static int mtk_dp_probe(struct platform_device *pdev) } mtk_dp->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0); - if (IS_ERR(mtk_dp->next_bridge)) { + if (IS_ERR(mtk_dp->next_bridge) && PTR_ERR(mtk_dp->next_bridge) == -ENODEV) { + dev_info(dev, + "No panel connected in devicetree, continuing as external DP\n"); + mtk_dp->next_bridge = NULL; + } else if (IS_ERR(mtk_dp->next_bridge)) { ret = PTR_ERR(mtk_dp->next_bridge); dev_err_probe(dev, ret, "Failed to get bridge\n"); return ret; @@ -2279,7 +2314,10 @@ static int mtk_dp_probe(struct platform_device *pdev) mtk_dp->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; - drm_bridge_add(&mtk_dp->bridge); + if (mtk_dp_is_edp(mtk_dp)) + mtk_dp->bridge.type = DRM_MODE_CONNECTOR_eDP; + else + mtk_dp->bridge.type = DRM_MODE_CONNECTOR_DisplayPort; pm_runtime_enable(dev); pm_runtime_get_sync(dev); @@ -2338,6 +2376,9 @@ static const struct of_device_id mtk_dp_of_match[] = { { .compatible = "mediatek,mt8195-edp-tx", }, + { + .compatible = "mediatek,mt8195-dp-tx", + }, {}, }; MODULE_DEVICE_TABLE(of, mtk_dp_of_match);