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([187.36.236.204]) by smtp.gmail.com with ESMTPSA id c9sm6325050otd.26.2022.02.22.05.18.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 05:18:29 -0800 (PST) From: =?utf-8?q?Ma=C3=ADra_Canal?= To: alexander.deucher@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, Hawking.Zhang@amd.com, john.clements@amd.com, tao.zhou1@amd.com, YiPeng.Chai@amd.com, luben.tuikov@amd.com, Stanley.Yang@amd.com, Dennis.Li@amd.com, mukul.joshi@amd.com, harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, Anthony.Koo@amd.com Subject: [PATCH 08/10] drm/amd/display: Remove unused variable Date: Tue, 22 Feb 2022 10:16:59 -0300 Message-Id: <20220222131701.356117-9-maira.canal@usp.br> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220222131701.356117-1-maira.canal@usp.br> References: <20220222131701.356117-1-maira.canal@usp.br> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: magalilemes00@gmail.com, =?utf-8?q?Ma=C3=ADra_Canal?= , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, mwen@igalia.com, amd-gfx@lists.freedesktop.org, isabbasso@riseup.net Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove the variable clamshell_closed from the function dcn10_align_pixel_clocks. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2063:7: warning: variable 'clamshell_closed' set but not used [-Wunused-but-set-variable] bool clamshell_closed = false; ^ Signed-off-by: Maíra Canal --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 8dc1afc03961..559aa45f27e7 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2060,14 +2060,11 @@ static int dcn10_align_pixel_clocks(struct dc *dc, int group_size, uint32_t embedded_pix_clk_100hz; uint16_t embedded_h_total; uint16_t embedded_v_total; - bool clamshell_closed = false; uint32_t dp_ref_clk_100hz = dc->res_pool->dp_clock_source->ctx->dc->clk_mgr->dprefclk_khz*10; if (dc->config.vblank_alignment_dto_params && dc->res_pool->dp_clock_source->funcs->override_dp_pix_clk) { - clamshell_closed = - (dc->config.vblank_alignment_dto_params >> 63); embedded_h_total = (dc->config.vblank_alignment_dto_params >> 32) & 0x7FFF; embedded_v_total =