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[2/3] drm/i915: Update mismatched structure name

Message ID 20220225132213.1435026-2-gwan-gyeong.mun@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/3] drm/doc: Fix typos and update outdated structure and API names | expand

Commit Message

Gwan-gyeong Mun Feb. 25, 2022, 1:22 p.m. UTC 
It updates i915_gem_ctx to i915_gem_ww_ctx and adds missing indefinite
article to doc.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 Documentation/gpu/i915.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index bcaefc952764..806454296b52 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -275,7 +275,7 @@  An Intel GPU has multiple engines. There are several engine types.
   space.
 - VCS is a video encode and decode engine, this is named `I915_EXEC_BSD`
   in user space
-- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user
+- VECS is a video enhancement engine, this is named `I915_EXEC_VEBOX` in user
   space.
 - The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine;
   instead it is to be used by user space to specify a default rendering
@@ -346,7 +346,7 @@  Locking Guidelines
 #. No struct_mutex anywhere in the code
 
 #. dma_resv will be the outermost lock (when needed) and ww_acquire_ctx
-   is to be hoisted at highest level and passed down within i915_gem_ctx
+   is to be hoisted at highest level and passed down within i915_gem_ww_ctx
    in the call chain
 
 #. While holding lru/memory manager (buddy, drm_mm, whatever) locks