Message ID | 20220311170601.50995-3-marex@denx.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/7] drm: mxsfb: Simplify LCDIF clock handling | expand |
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut: > Wrap FIFO reset and comments into mxsfb_reset_block(), this is a clean up. > No functional change. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Alexander Stein <alexander.stein@ew.tq-group.com> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Robby Cai <robby.cai@nxp.com> > Cc: Sam Ravnborg <sam@ravnborg.org> > Cc: Stefan Agner <stefan@agner.ch> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> > --- > V2: No change > --- > drivers/gpu/drm/mxsfb/mxsfb_kms.c | 36 +++++++++++++++++-------------- > 1 file changed, 20 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c > index 657b6afbbf1f9..015b289d93a3c 100644 > --- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c > +++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c > @@ -183,6 +183,12 @@ static int mxsfb_reset_block(struct mxsfb_drm_private *mxsfb) > { > int ret; > > + /* > + * It seems, you can't re-program the controller if it is still > + * running. This may lead to shifted pictures (FIFO issue?), so > + * first stop the controller and drain its FIFOs. > + */ > + > ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_SFTRST); > if (ret) > return ret; > @@ -193,7 +199,20 @@ static int mxsfb_reset_block(struct mxsfb_drm_private *mxsfb) > if (ret) > return ret; > > - return clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_CLKGATE); > + ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_CLKGATE); > + if (ret) > + return ret; > + > + /* Clear the FIFOs */ > + writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); > + readl(mxsfb->base + LCDC_CTRL1); > + writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_CLR); > + readl(mxsfb->base + LCDC_CTRL1); > + > + if (mxsfb->devdata->has_overlay) > + writel(0, mxsfb->base + LCDC_AS_CTRL); > + > + return 0; > } > > static dma_addr_t mxsfb_get_fb_paddr(struct drm_plane *plane) > @@ -220,26 +239,11 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb, > u32 vdctrl0, vsync_pulse_len, hsync_pulse_len; > int err; > > - /* > - * It seems, you can't re-program the controller if it is still > - * running. This may lead to shifted pictures (FIFO issue?), so > - * first stop the controller and drain its FIFOs. > - */ > - > /* Mandatory eLCDIF reset as per the Reference Manual */ > err = mxsfb_reset_block(mxsfb); > if (err) > return; > > - /* Clear the FIFOs */ > - writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); > - readl(mxsfb->base + LCDC_CTRL1); > - writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_CLR); > - readl(mxsfb->base + LCDC_CTRL1); > - > - if (mxsfb->devdata->has_overlay) > - writel(0, mxsfb->base + LCDC_AS_CTRL); > - > mxsfb_set_formats(mxsfb, bus_format); > > if (mxsfb->bridge && mxsfb->bridge->timings)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c index 657b6afbbf1f9..015b289d93a3c 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c @@ -183,6 +183,12 @@ static int mxsfb_reset_block(struct mxsfb_drm_private *mxsfb) { int ret; + /* + * It seems, you can't re-program the controller if it is still + * running. This may lead to shifted pictures (FIFO issue?), so + * first stop the controller and drain its FIFOs. + */ + ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_SFTRST); if (ret) return ret; @@ -193,7 +199,20 @@ static int mxsfb_reset_block(struct mxsfb_drm_private *mxsfb) if (ret) return ret; - return clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_CLKGATE); + ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, CTRL_CLKGATE); + if (ret) + return ret; + + /* Clear the FIFOs */ + writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); + readl(mxsfb->base + LCDC_CTRL1); + writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_CLR); + readl(mxsfb->base + LCDC_CTRL1); + + if (mxsfb->devdata->has_overlay) + writel(0, mxsfb->base + LCDC_AS_CTRL); + + return 0; } static dma_addr_t mxsfb_get_fb_paddr(struct drm_plane *plane) @@ -220,26 +239,11 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb, u32 vdctrl0, vsync_pulse_len, hsync_pulse_len; int err; - /* - * It seems, you can't re-program the controller if it is still - * running. This may lead to shifted pictures (FIFO issue?), so - * first stop the controller and drain its FIFOs. - */ - /* Mandatory eLCDIF reset as per the Reference Manual */ err = mxsfb_reset_block(mxsfb); if (err) return; - /* Clear the FIFOs */ - writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); - readl(mxsfb->base + LCDC_CTRL1); - writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_CLR); - readl(mxsfb->base + LCDC_CTRL1); - - if (mxsfb->devdata->has_overlay) - writel(0, mxsfb->base + LCDC_AS_CTRL); - mxsfb_set_formats(mxsfb, bus_format); if (mxsfb->bridge && mxsfb->bridge->timings)
Wrap FIFO reset and comments into mxsfb_reset_block(), this is a clean up. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> --- V2: No change --- drivers/gpu/drm/mxsfb/mxsfb_kms.c | 36 +++++++++++++++++-------------- 1 file changed, 20 insertions(+), 16 deletions(-)