Message ID | 20220330232858.3204283-7-matthew.d.roper@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | i915: Explicit handling of multicast registers | expand |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index efb81cb4c7c0..062e11289aa0 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8494,9 +8494,6 @@ enum skl_power_gate { #define XEHPSDV_TILE0_ADDR_RANGE _MMIO(0x4900) #define XEHPSDV_TILE_LMEM_RANGE_SHIFT 8 -#define XEHPSDV_FLAT_CCS_BASE_ADDR _MMIO(0x4910) -#define XEHPSDV_CCS_BASE_SHIFT 8 - /* gamt regs */ #define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4) #define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW 0x67F1427F /* max/min for LRA1/2 */
When this register was moved to intel_gt_regs.h it wasn't dropped from i915_reg.h; do so now. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 --- 1 file changed, 3 deletions(-)