From patchwork Wed Apr 6 09:40:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 12803004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF9AFC433FE for ; Wed, 6 Apr 2022 09:41:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E96B410F2D6; Wed, 6 Apr 2022 09:41:24 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id C187B10F2C9; Wed, 6 Apr 2022 09:41:23 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 41CE761558; Wed, 6 Apr 2022 09:41:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 286F3C385A8; Wed, 6 Apr 2022 09:41:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649238082; bh=n3Wkk5bm16a05lN7V/okcIiS7mgAL2qB7YWgC48E5A4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nscBFOvEavmhMd+lAs4kpGbt/Ve0styAwRkfWwbsoysfwHrOV0lslc8yJHJ5i/L2w 6FbCcdFnepqBNCNL0pq0QytwTw87vVe3SxMtj3otqBYFjaaWkNxMp2OEYqgjWqcDla Px62Za3fIQzInt4IAVn6mV7jTWk6ZKyhaFpdc5pdoa3a07XShBLGfTSpDBJmPBSrZb FYe9/PLDaUG530a7R+l3QGhp6vsCO3I8RAjW2ud9Ruc07WBmScAnSFjwd9xEj8rMrv MuYnMdhDzP1LN5zP5pA0rxEDEFtuehoQ8WPyBejVpiyRGQLTjsJ5jwlfxWwPfDG5Q0 qCf5XMRbm4MCQ== From: Vinod Koul To: Rob Clark Subject: [PATCH v7 10/14] drm/msm/disp/dpu1: Add support for DSC in topology Date: Wed, 6 Apr 2022 15:10:27 +0530 Message-Id: <20220406094031.1027376-11-vkoul@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220406094031.1027376-1-vkoul@kernel.org> References: <20220406094031.1027376-1-vkoul@kernel.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jonathan Marek , David Airlie , linux-arm-msm@vger.kernel.org, Abhinav Kumar , dri-devel@lists.freedesktop.org, Bjorn Andersson , Vinod Koul , Dmitry Baryshkov , freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For DSC to work we typically need a 2,2,1 configuration. This should suffice for resolutions up to 4k. For more resolutions like 8k this won't work. Also, it is better to use 2 LMs and DSC instances as half width results in lesser power consumption as compared to single LM, DSC at full width. The panel has been tested only with 2,2,1 configuration, so for now we blindly create 2,2,1 topology when DSC is enabled Co-developed-by: Abhinav Kumar Signed-off-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov Signed-off-by: Vinod Koul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 +++++++++++++ drivers/gpu/drm/msm/msm_drv.h | 2 ++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 95d1588f3bb6..51f24ba68375 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -567,8 +567,21 @@ static struct msm_display_topology dpu_encoder_get_topology( topology.num_enc = 0; topology.num_intf = intf_count; + if (dpu_enc->dsc) { + /* In case of Display Stream Compression (DSC), we would use + * 2 encoders, 2 layer mixers and 1 interface + * this is power optimal and can drive up to (including) 4k + * screens + */ + topology.num_enc = 2; + topology.num_dsc = 2; + topology.num_intf = 1; + topology.num_lm = 2; + } + return topology; } + static int dpu_encoder_virt_atomic_check( struct drm_encoder *drm_enc, struct drm_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index bf2ccff97562..0ace9b0549a4 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -103,12 +103,14 @@ enum msm_event_wait { * @num_enc: number of compression encoder blocks used * @num_intf: number of interfaces the panel is mounted on * @num_dspp: number of dspp blocks used + * @num_dsc: number of Display Stream Compression (DSC) blocks used */ struct msm_display_topology { u32 num_lm; u32 num_enc; u32 num_intf; u32 num_dspp; + u32 num_dsc; }; /* Commit/Event thread specific structure */