From patchwork Thu Apr 21 05:07:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 12821075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E31B0C433F5 for ; Thu, 21 Apr 2022 05:08:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32AB510F342; Thu, 21 Apr 2022 05:08:37 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 305D410F343; Thu, 21 Apr 2022 05:08:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650517716; x=1682053716; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oUkrWnlJAvvYHsrAvQFYHVGx+PL7pK6wqf72VXDwLpw=; b=N+YkWPjkJZr/tGm/7fUPmOEgjdPxCd9rY8fEmexa9azs0w4lymh1RU84 kwln4dFsICVaN+E09mIPn3xU4cY2vbYGv/nFrqOnpuhgHYUKBXar+T87y 5PSFALiyd+n8Th9Ci4hnI29NNYfqkGBxiz4BDF2qduqvQqgN76rKCij6o kRsWrjfGLwbZD0Lcr0yHPFe/BFPNeUbSEliuV6OjH8gpq9SGDvKReMFgb 0i/LWvn7iKuZWCdtKKjVQhvpPrGXiWoPlnfqiMG3SSfSSD/tD28PK1ueM NL8N2pvxBshFvb5FGyCn1y23yv8ZAiGKMFJ09K1ZtH9j0QRVOTpFUYGM8 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10323"; a="261842596" X-IronPort-AV: E=Sophos;i="5.90,277,1643702400"; d="scan'208";a="261842596" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2022 22:08:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,277,1643702400"; d="scan'208";a="555577683" Received: from kandpal.iind.intel.com ([10.190.239.32]) by orsmga007.jf.intel.com with ESMTP; 20 Apr 2022 22:08:32 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [RFC PATCH 2/3] drm/i915: Define WD trancoder for i915 Date: Thu, 21 Apr 2022 10:37:55 +0530 Message-Id: <20220421050756.2036609-3-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220421050756.2036609-1-suraj.kandpal@intel.com> References: <20220421050756.2036609-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, Suraj Kandpal , arun.r.murthy@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Adding WD Types, WD transcoder to enum list and WD Transcoder offsets Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 6 ++++++ drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 2 ++ 3 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 8513703086b7..8c93a5de8e07 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -119,6 +119,8 @@ enum transcoder { TRANSCODER_DSI_1, TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */ TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */ + TRANSCODER_WD_0, + TRANSCODER_WD_1, I915_MAX_TRANSCODERS }; @@ -140,6 +142,10 @@ static inline const char *transcoder_name(enum transcoder transcoder) return "DSI A"; case TRANSCODER_DSI_C: return "DSI C"; + case TRANSCODER_WD_0: + return "WD 0"; + case TRANSCODER_WD_1: + return "WD 1"; default: return ""; } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 7a96ecba73c0..dcb4ad43cf88 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -79,6 +79,7 @@ enum intel_output_type { INTEL_OUTPUT_DSI = 9, INTEL_OUTPUT_DDI = 10, INTEL_OUTPUT_DP_MST = 11, + INTEL_OUTPUT_WD = 12, }; enum hdmi_force_audio { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ddbc7a685a50..6396afd77209 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2023,6 +2023,8 @@ #define TRANSCODER_EDP_OFFSET 0x6f000 #define TRANSCODER_DSI0_OFFSET 0x6b000 #define TRANSCODER_DSI1_OFFSET 0x6b800 +#define TRANSCODER_WD0_OFFSET 0x6e000 +#define TRANSCODER_WD1_OFFSET 0x6e800 #define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A) #define HBLANK(trans) _MMIO_TRANS2(trans, _HBLANK_A)