diff mbox series

[v3,3/4] drm: rcar-du: Add num_rpf to struct rcar_du_device_info

Message ID 20220421163128.101520-4-biju.das.jz@bp.renesas.com (mailing list archive)
State New, archived
Headers show
Series Add RZ/G2L Display support | expand

Commit Message

Biju Das April 21, 2022, 4:31 p.m. UTC 
Number of RPF's VSP is different on R-Car and RZ/G2L
 R-Car Gen3 -> 5 RPFs
 R-Car Gen2 -> 4 RPFs
 RZ/G2L -> 2 RPFs

Add num_rpf to struct rcar_du_device_info to support later
SoC without any code changes.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v2->v3:
 * Added Rb tag from Laurent.
 * Fixed the comment "max num"->"num"
---
 drivers/gpu/drm/rcar-du/rcar_du_drv.c | 17 +++++++++++++++++
 drivers/gpu/drm/rcar-du/rcar_du_drv.h |  2 ++
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c |  6 +-----
 3 files changed, 20 insertions(+), 5 deletions(-)

Comments

Biju Das June 7, 2022, 10:58 a.m. UTC | #1 
Hi All,

Gentle ping. Are we happy with this patch?

Since RZ/G2L is using separate drm driver,
I can drop this patch, if needed.

Please let me know.

Cheers,
Biju

> Subject: [PATCH v3 3/4] drm: rcar-du: Add num_rpf to struct
> rcar_du_device_info
> 
> Number of RPF's VSP is different on R-Car and RZ/G2L  R-Car Gen3 -> 5
> RPFs  R-Car Gen2 -> 4 RPFs  RZ/G2L -> 2 RPFs
> 
> Add num_rpf to struct rcar_du_device_info to support later SoC without
> any code changes.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> v2->v3:
>  * Added Rb tag from Laurent.
>  * Fixed the comment "max num"->"num"
> ---
>  drivers/gpu/drm/rcar-du/rcar_du_drv.c | 17 +++++++++++++++++
> drivers/gpu/drm/rcar-du/rcar_du_drv.h |  2 ++  drivers/gpu/drm/rcar-
> du/rcar_du_vsp.c |  6 +-----
>  3 files changed, 20 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> index 957ea97541d5..1bc7325aa356 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> @@ -55,6 +55,7 @@ static const struct rcar_du_device_info
> rzg1_du_r8a7743_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 4,
>  };
> 
>  static const struct rcar_du_device_info rzg1_du_r8a7745_info = { @@ -
> 77,6 +78,7 @@ static const struct rcar_du_device_info
> rzg1_du_r8a7745_info = {
>  			.port = 1,
>  		},
>  	},
> +	.num_rpf = 4,
>  };
> 
>  static const struct rcar_du_device_info rzg1_du_r8a77470_info = { @@ -
> 104,6 +106,7 @@ static const struct rcar_du_device_info
> rzg1_du_r8a77470_info = {
>  			.port = 2,
>  		},
>  	},
> +	.num_rpf = 4,
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a774a1_info = { @@ -
> 133,6 +136,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a774a1_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  	.dpll_mask =  BIT(1),
>  };
> 
> @@ -163,6 +167,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a774b1_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  	.dpll_mask =  BIT(1),
>  };
> 
> @@ -190,6 +195,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a774c0_info = {
>  		},
>  	},
>  	.num_lvds = 2,
> +	.num_rpf = 4,
>  	.lvds_clk_mask =  BIT(1) | BIT(0),
>  };
> 
> @@ -220,6 +226,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a774e1_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  	.dpll_mask =  BIT(1),
>  };
> 
> @@ -272,6 +279,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7790_info = {
>  		},
>  	},
>  	.num_lvds = 2,
> +	.num_rpf = 4,
>  };
> 
>  /* M2-W (r8a7791) and M2-N (r8a7793) are identical */ @@ -297,6 +305,7
> @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 4,
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a7792_info = { @@ -
> 317,6 +326,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7792_info = {
>  			.port = 1,
>  		},
>  	},
> +	.num_rpf = 4,
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a7794_info = { @@ -
> 340,6 +350,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7794_info = {
>  			.port = 1,
>  		},
>  	},
> +	.num_rpf = 4,
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a7795_info = { @@ -
> 373,6 +384,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7795_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  	.dpll_mask =  BIT(2) | BIT(1),
>  };
> 
> @@ -403,6 +415,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7796_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  	.dpll_mask =  BIT(1),
>  };
> 
> @@ -433,6 +446,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a77965_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  	.dpll_mask =  BIT(1),
>  };
> 
> @@ -459,6 +473,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a77970_info = {
>  		},
>  	},
>  	.num_lvds = 1,
> +	.num_rpf = 5,
>  };
> 
>  static const struct rcar_du_device_info rcar_du_r8a7799x_info = { @@ -
> 486,6 +501,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a7799x_info = {
>  		},
>  	},
>  	.num_lvds = 2,
> +	.num_rpf = 5,
>  	.lvds_clk_mask =  BIT(1) | BIT(0),
>  };
> 
> @@ -505,6 +521,7 @@ static const struct rcar_du_device_info
> rcar_du_r8a779a0_info = {
>  			.port = 1,
>  		},
>  	},
> +	.num_rpf = 5,
>  	.dsi_clk_mask =  BIT(1) | BIT(0),
>  };
> 
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> index 101f42df86ea..83530721e373 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> @@ -69,6 +69,7 @@ struct rcar_du_output_routing {
>   * @channels_mask: bit mask of available DU channels
>   * @routes: array of CRTC to output routes, indexed by output
> (RCAR_DU_OUTPUT_*)
>   * @num_lvds: number of internal LVDS encoders
> + * @num_rpf: number of RPFs in VSP
>   * @dpll_mask: bit mask of DU channels equipped with a DPLL
>   * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot
> clock
>   * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as
> dot clock @@ -80,6 +81,7 @@ struct rcar_du_device_info {
>  	unsigned int channels_mask;
>  	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
>  	unsigned int num_lvds;
> +	unsigned int num_rpf;
>  	unsigned int dpll_mask;
>  	unsigned int dsi_clk_mask;
>  	unsigned int lvds_clk_mask;
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> index 9c4d1d1be1d4..abd31fd1e979 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> @@ -405,11 +405,7 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
> struct device_node *np,
>  	if (ret < 0)
>  		return ret;
> 
> -	 /*
> -	  * The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited
> to
> -	  * 4 RPFs.
> -	  */
> -	num_planes = rcdu->info->gen >= 3 ? 5 : 4;
> +	num_planes = rcdu->info->num_rpf;
> 
>  	vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes),
> GFP_KERNEL);
>  	if (!vsp->planes)
> --
> 2.25.1
Kieran Bingham June 7, 2022, 11:11 a.m. UTC | #2 
Quoting Biju Das (2022-06-07 11:58:08)
> Hi All,
> 
> Gentle ping. Are we happy with this patch?
> 

The patch itself looks fine to me.

Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

> Since RZ/G2L is using separate drm driver,
> I can drop this patch, if needed.
> 

But indeed, it's not clear if the requirement is still there if the RZ
doesn't use this code path now. But there could be future generations
with more (or less?) RPFs ... so it's not unreasonable.

I wonder if it's something that would only be worth applying when needed
though, as otherwise we're increasing the binary size for no real gain.

(17 * 4 = only 68 bytes ... but ... I know people try to reduce these
sizes where possible).

--
Kieran



> Please let me know.
> 
> Cheers,
> Biju
> 
> > Subject: [PATCH v3 3/4] drm: rcar-du: Add num_rpf to struct
> > rcar_du_device_info
> > 
> > Number of RPF's VSP is different on R-Car and RZ/G2L  R-Car Gen3 -> 5
> > RPFs  R-Car Gen2 -> 4 RPFs  RZ/G2L -> 2 RPFs
> > 
> > Add num_rpf to struct rcar_du_device_info to support later SoC without
> > any code changes.
> > 
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> > v2->v3:
> >  * Added Rb tag from Laurent.
> >  * Fixed the comment "max num"->"num"
> > ---
> >  drivers/gpu/drm/rcar-du/rcar_du_drv.c | 17 +++++++++++++++++
> > drivers/gpu/drm/rcar-du/rcar_du_drv.h |  2 ++  drivers/gpu/drm/rcar-
> > du/rcar_du_vsp.c |  6 +-----
> >  3 files changed, 20 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > index 957ea97541d5..1bc7325aa356 100644
> > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > @@ -55,6 +55,7 @@ static const struct rcar_du_device_info
> > rzg1_du_r8a7743_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 4,
> >  };
> > 
> >  static const struct rcar_du_device_info rzg1_du_r8a7745_info = { @@ -
> > 77,6 +78,7 @@ static const struct rcar_du_device_info
> > rzg1_du_r8a7745_info = {
> >                       .port = 1,
> >               },
> >       },
> > +     .num_rpf = 4,
> >  };
> > 
> >  static const struct rcar_du_device_info rzg1_du_r8a77470_info = { @@ -
> > 104,6 +106,7 @@ static const struct rcar_du_device_info
> > rzg1_du_r8a77470_info = {
> >                       .port = 2,
> >               },
> >       },
> > +     .num_rpf = 4,
> >  };
> > 
> >  static const struct rcar_du_device_info rcar_du_r8a774a1_info = { @@ -
> > 133,6 +136,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a774a1_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >       .dpll_mask =  BIT(1),
> >  };
> > 
> > @@ -163,6 +167,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a774b1_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >       .dpll_mask =  BIT(1),
> >  };
> > 
> > @@ -190,6 +195,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a774c0_info = {
> >               },
> >       },
> >       .num_lvds = 2,
> > +     .num_rpf = 4,
> >       .lvds_clk_mask =  BIT(1) | BIT(0),
> >  };
> > 
> > @@ -220,6 +226,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a774e1_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >       .dpll_mask =  BIT(1),
> >  };
> > 
> > @@ -272,6 +279,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a7790_info = {
> >               },
> >       },
> >       .num_lvds = 2,
> > +     .num_rpf = 4,
> >  };
> > 
> >  /* M2-W (r8a7791) and M2-N (r8a7793) are identical */ @@ -297,6 +305,7
> > @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 4,
> >  };
> > 
> >  static const struct rcar_du_device_info rcar_du_r8a7792_info = { @@ -
> > 317,6 +326,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a7792_info = {
> >                       .port = 1,
> >               },
> >       },
> > +     .num_rpf = 4,
> >  };
> > 
> >  static const struct rcar_du_device_info rcar_du_r8a7794_info = { @@ -
> > 340,6 +350,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a7794_info = {
> >                       .port = 1,
> >               },
> >       },
> > +     .num_rpf = 4,
> >  };
> > 
> >  static const struct rcar_du_device_info rcar_du_r8a7795_info = { @@ -
> > 373,6 +384,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a7795_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >       .dpll_mask =  BIT(2) | BIT(1),
> >  };
> > 
> > @@ -403,6 +415,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a7796_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >       .dpll_mask =  BIT(1),
> >  };
> > 
> > @@ -433,6 +446,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a77965_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >       .dpll_mask =  BIT(1),
> >  };
> > 
> > @@ -459,6 +473,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a77970_info = {
> >               },
> >       },
> >       .num_lvds = 1,
> > +     .num_rpf = 5,
> >  };
> > 
> >  static const struct rcar_du_device_info rcar_du_r8a7799x_info = { @@ -
> > 486,6 +501,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a7799x_info = {
> >               },
> >       },
> >       .num_lvds = 2,
> > +     .num_rpf = 5,
> >       .lvds_clk_mask =  BIT(1) | BIT(0),
> >  };
> > 
> > @@ -505,6 +521,7 @@ static const struct rcar_du_device_info
> > rcar_du_r8a779a0_info = {
> >                       .port = 1,
> >               },
> >       },
> > +     .num_rpf = 5,
> >       .dsi_clk_mask =  BIT(1) | BIT(0),
> >  };
> > 
> > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> > b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> > index 101f42df86ea..83530721e373 100644
> > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
> > @@ -69,6 +69,7 @@ struct rcar_du_output_routing {
> >   * @channels_mask: bit mask of available DU channels
> >   * @routes: array of CRTC to output routes, indexed by output
> > (RCAR_DU_OUTPUT_*)
> >   * @num_lvds: number of internal LVDS encoders
> > + * @num_rpf: number of RPFs in VSP
> >   * @dpll_mask: bit mask of DU channels equipped with a DPLL
> >   * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot
> > clock
> >   * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as
> > dot clock @@ -80,6 +81,7 @@ struct rcar_du_device_info {
> >       unsigned int channels_mask;
> >       struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
> >       unsigned int num_lvds;
> > +     unsigned int num_rpf;
> >       unsigned int dpll_mask;
> >       unsigned int dsi_clk_mask;
> >       unsigned int lvds_clk_mask;
> > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> > b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> > index 9c4d1d1be1d4..abd31fd1e979 100644
> > --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> > +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
> > @@ -405,11 +405,7 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
> > struct device_node *np,
> >       if (ret < 0)
> >               return ret;
> > 
> > -      /*
> > -       * The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited
> > to
> > -       * 4 RPFs.
> > -       */
> > -     num_planes = rcdu->info->gen >= 3 ? 5 : 4;
> > +     num_planes = rcdu->info->num_rpf;
> > 
> >       vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes),
> > GFP_KERNEL);
> >       if (!vsp->planes)
> > --
> > 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
index 957ea97541d5..1bc7325aa356 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
@@ -55,6 +55,7 @@  static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 4,
 };
 
 static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
@@ -77,6 +78,7 @@  static const struct rcar_du_device_info rzg1_du_r8a7745_info = {
 			.port = 1,
 		},
 	},
+	.num_rpf = 4,
 };
 
 static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
@@ -104,6 +106,7 @@  static const struct rcar_du_device_info rzg1_du_r8a77470_info = {
 			.port = 2,
 		},
 	},
+	.num_rpf = 4,
 };
 
 static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
@@ -133,6 +136,7 @@  static const struct rcar_du_device_info rcar_du_r8a774a1_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 	.dpll_mask =  BIT(1),
 };
 
@@ -163,6 +167,7 @@  static const struct rcar_du_device_info rcar_du_r8a774b1_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 	.dpll_mask =  BIT(1),
 };
 
@@ -190,6 +195,7 @@  static const struct rcar_du_device_info rcar_du_r8a774c0_info = {
 		},
 	},
 	.num_lvds = 2,
+	.num_rpf = 4,
 	.lvds_clk_mask =  BIT(1) | BIT(0),
 };
 
@@ -220,6 +226,7 @@  static const struct rcar_du_device_info rcar_du_r8a774e1_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 	.dpll_mask =  BIT(1),
 };
 
@@ -272,6 +279,7 @@  static const struct rcar_du_device_info rcar_du_r8a7790_info = {
 		},
 	},
 	.num_lvds = 2,
+	.num_rpf = 4,
 };
 
 /* M2-W (r8a7791) and M2-N (r8a7793) are identical */
@@ -297,6 +305,7 @@  static const struct rcar_du_device_info rcar_du_r8a7791_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 4,
 };
 
 static const struct rcar_du_device_info rcar_du_r8a7792_info = {
@@ -317,6 +326,7 @@  static const struct rcar_du_device_info rcar_du_r8a7792_info = {
 			.port = 1,
 		},
 	},
+	.num_rpf = 4,
 };
 
 static const struct rcar_du_device_info rcar_du_r8a7794_info = {
@@ -340,6 +350,7 @@  static const struct rcar_du_device_info rcar_du_r8a7794_info = {
 			.port = 1,
 		},
 	},
+	.num_rpf = 4,
 };
 
 static const struct rcar_du_device_info rcar_du_r8a7795_info = {
@@ -373,6 +384,7 @@  static const struct rcar_du_device_info rcar_du_r8a7795_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 	.dpll_mask =  BIT(2) | BIT(1),
 };
 
@@ -403,6 +415,7 @@  static const struct rcar_du_device_info rcar_du_r8a7796_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 	.dpll_mask =  BIT(1),
 };
 
@@ -433,6 +446,7 @@  static const struct rcar_du_device_info rcar_du_r8a77965_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 	.dpll_mask =  BIT(1),
 };
 
@@ -459,6 +473,7 @@  static const struct rcar_du_device_info rcar_du_r8a77970_info = {
 		},
 	},
 	.num_lvds = 1,
+	.num_rpf = 5,
 };
 
 static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
@@ -486,6 +501,7 @@  static const struct rcar_du_device_info rcar_du_r8a7799x_info = {
 		},
 	},
 	.num_lvds = 2,
+	.num_rpf = 5,
 	.lvds_clk_mask =  BIT(1) | BIT(0),
 };
 
@@ -505,6 +521,7 @@  static const struct rcar_du_device_info rcar_du_r8a779a0_info = {
 			.port = 1,
 		},
 	},
+	.num_rpf = 5,
 	.dsi_clk_mask =  BIT(1) | BIT(0),
 };
 
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
index 101f42df86ea..83530721e373 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
@@ -69,6 +69,7 @@  struct rcar_du_output_routing {
  * @channels_mask: bit mask of available DU channels
  * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
  * @num_lvds: number of internal LVDS encoders
+ * @num_rpf: number of RPFs in VSP
  * @dpll_mask: bit mask of DU channels equipped with a DPLL
  * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot clock
  * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock
@@ -80,6 +81,7 @@  struct rcar_du_device_info {
 	unsigned int channels_mask;
 	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
 	unsigned int num_lvds;
+	unsigned int num_rpf;
 	unsigned int dpll_mask;
 	unsigned int dsi_clk_mask;
 	unsigned int lvds_clk_mask;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 9c4d1d1be1d4..abd31fd1e979 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -405,11 +405,7 @@  int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
 	if (ret < 0)
 		return ret;
 
-	 /*
-	  * The VSP2D (Gen3) has 5 RPFs, but the VSP1D (Gen2) is limited to
-	  * 4 RPFs.
-	  */
-	num_planes = rcdu->info->gen >= 3 ? 5 : 4;
+	num_planes = rcdu->info->num_rpf;
 
 	vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL);
 	if (!vsp->planes)