diff mbox series

[v11,17/24] arm64: dts: rockchip: rk356x: Add HDMI nodes

Message ID 20220422072841.2206452-18-s.hauer@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series drm/rockchip: RK356x VOP2 support | expand

Commit Message

Sascha Hauer April 22, 2022, 7:28 a.m. UTC
Add support for the HDMI port found on RK3568.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---

Notes:
    Changes since v7:
    - Rename hclk to niu
    
    Changes since v5:
    - Drop unnecessary #size-cells/#address-cells from nodes with only single endpoint

 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 32 ++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

Frank Wunderlich May 5, 2022, 8:45 a.m. UTC | #1
Hi,

> Gesendet: Freitag, 22. April 2022 um 09:28 Uhr
> Von: "Sascha Hauer" <s.hauer@pengutronix.de>
> Betreff: [PATCH v11 17/24] arm64: dts: rockchip: rk356x: Add HDMI nodes
>
> Add support for the HDMI port found on RK3568.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>
> Notes:
>     Changes since v7:
>     - Rename hclk to niu

clock-name no more present since v9, see below

>     Changes since v5:
>     - Drop unnecessary #size-cells/#address-cells from nodes with only single endpoint
>
...
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -620,6 +620,38 @@ vop_mmu: iommu@fe043e00 {
>  		status = "disabled";
>  	};
>
> +	hdmi: hdmi@fe0a0000 {
> +		compatible = "rockchip,rk3568-dw-hdmi";
> +		reg = <0x0 0xfe0a0000 0x0 0x20000>;
> +		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru PCLK_HDMI_HOST>,
> +			 <&cru CLK_HDMI_SFR>,
> +			 <&cru CLK_HDMI_CEC>,
> +			 <&pmucru CLK_HDMI_REF>,
> +			 <&cru HCLK_VO>;
> +		clock-names = "iahb", "isfr", "cec", "ref";

noticed there are still 5 clocks, but only 4 clock-names. So i added "niu" after ref.
maybe missing clock-name was causing my iommu page-faults...on a quick test i have not got it,
but they came not every time.

what do you think?

> +		pinctrl-names = "default";
> +		pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
> +		power-domains = <&power RK3568_PD_VO>;

regards Frank
Sascha Hauer May 5, 2022, 9:05 a.m. UTC | #2
On Thu, May 05, 2022 at 10:45:03AM +0200, Frank Wunderlich wrote:
> Hi,
> 
> > Gesendet: Freitag, 22. April 2022 um 09:28 Uhr
> > Von: "Sascha Hauer" <s.hauer@pengutronix.de>
> > Betreff: [PATCH v11 17/24] arm64: dts: rockchip: rk356x: Add HDMI nodes
> >
> > Add support for the HDMI port found on RK3568.
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > ---
> >
> > Notes:
> >     Changes since v7:
> >     - Rename hclk to niu
> 
> clock-name no more present since v9, see below
> 
> >     Changes since v5:
> >     - Drop unnecessary #size-cells/#address-cells from nodes with only single endpoint
> >
> ...
> > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > @@ -620,6 +620,38 @@ vop_mmu: iommu@fe043e00 {
> >  		status = "disabled";
> >  	};
> >
> > +	hdmi: hdmi@fe0a0000 {
> > +		compatible = "rockchip,rk3568-dw-hdmi";
> > +		reg = <0x0 0xfe0a0000 0x0 0x20000>;
> > +		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> > +		clocks = <&cru PCLK_HDMI_HOST>,
> > +			 <&cru CLK_HDMI_SFR>,
> > +			 <&cru CLK_HDMI_CEC>,
> > +			 <&pmucru CLK_HDMI_REF>,
> > +			 <&cru HCLK_VO>;
> > +		clock-names = "iahb", "isfr", "cec", "ref";
> 
> noticed there are still 5 clocks, but only 4 clock-names. So i added "niu" after ref.
> maybe missing clock-name was causing my iommu page-faults...on a quick test i have not got it,
> but they came not every time.

The clock is not handled by the HDMI driver, so it shouldn't be the
cause for any failure. It should be dropped here.

Heiko, could you apply the below patch or squash it into the original
one?

Sascha

-------------------------------8<---------------------------

From 8e5f90273401d98b2202676aafd49a350c9c4abd Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Thu, 5 May 2022 10:59:48 +0200
Subject: [PATCH] arm64: dts: rockchip: rk356x: remove extra hdmi clock

HCLK_VO is not handled by the HDMI driver. This is a leftover from
earlier VOP2 series. Remove it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 1a359bbf65300..49eb45e23f8c9 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -627,8 +627,7 @@ hdmi: hdmi@fe0a0000 {
 		clocks = <&cru PCLK_HDMI_HOST>,
 			 <&cru CLK_HDMI_SFR>,
 			 <&cru CLK_HDMI_CEC>,
-			 <&pmucru CLK_HDMI_REF>,
-			 <&cru HCLK_VO>;
+			 <&pmucru CLK_HDMI_REF>;
 		clock-names = "iahb", "isfr", "cec", "ref";
 		pinctrl-names = "default";
 		pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index fdb7a9a6ca743..1a359bbf65300 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -620,6 +620,38 @@  vop_mmu: iommu@fe043e00 {
 		status = "disabled";
 	};
 
+	hdmi: hdmi@fe0a0000 {
+		compatible = "rockchip,rk3568-dw-hdmi";
+		reg = <0x0 0xfe0a0000 0x0 0x20000>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_HDMI_HOST>,
+			 <&cru CLK_HDMI_SFR>,
+			 <&cru CLK_HDMI_CEC>,
+			 <&pmucru CLK_HDMI_REF>,
+			 <&cru HCLK_VO>;
+		clock-names = "iahb", "isfr", "cec", "ref";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>;
+		power-domains = <&power RK3568_PD_VO>;
+		reg-io-width = <4>;
+		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			hdmi_in: port@0 {
+				reg = <0>;
+			};
+
+			hdmi_out: port@1 {
+				reg = <1>;
+			};
+		};
+	};
+
 	qos_gpu: qos@fe128000 {
 		compatible = "rockchip,rk3568-qos", "syscon";
 		reg = <0x0 0xfe128000 0x0 0x20>;