diff mbox series

[14/20] drm/amd/display: Clean up some inconsistent indenting

Message ID 20220726072555.91323-14-jiapeng.chong@linux.alibaba.com (mailing list archive)
State New, archived
Headers show
Series [01/20] drm/amd/display: Clean up some inconsistent indenting | expand

Commit Message

Jiapeng Chong July 26, 2022, 7:25 a.m. UTC 
No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:450 dpp20_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:543 dpp20_get_shaper_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
---
 .../drm/amd/display/dc/dcn20/dcn20_dpp_cm.c   | 68 +++++++++----------
 1 file changed, 34 insertions(+), 34 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
index 2feb051a2002..598caa508d43 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
@@ -444,24 +444,24 @@  static enum dc_lut_mode dpp20_get_blndgam_current(struct dpp *dpp_base)
 	uint32_t state_mode;
 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
 
-	REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK,
-					CM_BLNDGAM_CONFIG_STATUS, &state_mode);
+	REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK, CM_BLNDGAM_CONFIG_STATUS, &state_mode);
 
-		switch (state_mode) {
-		case 0:
-			mode = LUT_BYPASS;
-			break;
-		case 1:
-			mode = LUT_RAM_A;
-			break;
-		case 2:
-			mode = LUT_RAM_B;
-			break;
-		default:
-			mode = LUT_BYPASS;
-			break;
-		}
-		return mode;
+	switch (state_mode) {
+	case 0:
+		mode = LUT_BYPASS;
+		break;
+	case 1:
+		mode = LUT_RAM_A;
+		break;
+	case 2:
+		mode = LUT_RAM_B;
+		break;
+	default:
+		mode = LUT_BYPASS;
+		break;
+	}
+
+	return mode;
 }
 
 bool dpp20_program_blnd_lut(
@@ -537,24 +537,24 @@  static enum dc_lut_mode dpp20_get_shaper_current(struct dpp *dpp_base)
 	uint32_t state_mode;
 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
 
-	REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK,
-			CM_SHAPER_CONFIG_STATUS, &state_mode);
+	REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK, CM_SHAPER_CONFIG_STATUS, &state_mode);
 
-		switch (state_mode) {
-		case 0:
-			mode = LUT_BYPASS;
-			break;
-		case 1:
-			mode = LUT_RAM_A;
-			break;
-		case 2:
-			mode = LUT_RAM_B;
-			break;
-		default:
-			mode = LUT_BYPASS;
-			break;
-		}
-		return mode;
+	switch (state_mode) {
+	case 0:
+		mode = LUT_BYPASS;
+		break;
+	case 1:
+		mode = LUT_RAM_A;
+		break;
+	case 2:
+		mode = LUT_RAM_B;
+		break;
+	default:
+		mode = LUT_BYPASS;
+		break;
+	}
+
+	return mode;
 }
 
 static void dpp20_configure_shaper_lut(