diff mbox series

[3/4] drm/i915: Extract drm_dp_atomic_find_vcpi_slots cycle to separate function

Message ID 20220901101143.32316-4-stanislav.lisovskiy@intel.com (mailing list archive)
State New, archived
Headers show
Series Add DP MST DSC support to i915 | expand

Commit Message

Stanislav Lisovskiy Sept. 1, 2022, 10:11 a.m. UTC 
We would be using almost same code to loop through bpps while calling
drm_dp_atomic_find_vcpi_slots - lets remove this duplication by
introducing a new function intel_dp_mst_find_vcpi_slots_for_bpp

v2: Fix pbn_div calculation - shouldn't matter if its DSC or not.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 52 +++++++++++++++------
 1 file changed, 39 insertions(+), 13 deletions(-)

Comments

Govindapillai, Vinod Sept. 4, 2022, 11:37 a.m. UTC | #1 
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

Vinod

On Thu, 2022-09-01 at 13:11 +0300, Stanislav Lisovskiy wrote:
> We would be using almost same code to loop through bpps while calling
> drm_dp_atomic_find_vcpi_slots - lets remove this duplication by
> introducing a new function intel_dp_mst_find_vcpi_slots_for_bpp
> 
> v2: Fix pbn_div calculation - shouldn't matter if its DSC or not.
> 
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 52 +++++++++++++++------
>  1 file changed, 39 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index c4f92edbdd08..72d63f293987 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -44,10 +44,14 @@
>  #include "intel_hotplug.h"
>  #include "skl_scaler.h"
>  
> -static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> -                                           struct intel_crtc_state *crtc_state,
> -                                           struct drm_connector_state *conn_state,
> -                                           struct link_config_limits *limits)
> +static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> +                                               struct intel_crtc_state *crtc_state,
> +                                               int max_bpp,
> +                                               int min_bpp,
> +                                               struct link_config_limits *limits,
> +                                               struct drm_connector_state *conn_state,
> +                                               int step,
> +                                               bool dsc)
>  {
>         struct drm_atomic_state *state = crtc_state->uapi.state;
>         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> @@ -58,7 +62,6 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
>         struct drm_i915_private *i915 = to_i915(connector->base.dev);
>         const struct drm_display_mode *adjusted_mode =
>                 &crtc_state->hw.adjusted_mode;
> -       bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
>         int bpp, slots = -EINVAL;
>         int ret = 0;
>  
> @@ -72,18 +75,20 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
>         // TODO: Handle pbn_div changes by adding a new MST helper
>         if (!mst_state->pbn_div) {
>                 mst_state->pbn_div = drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
> -                                                             limits->max_rate,
> -                                                             limits->max_lane_count);
> +                                                             crtc_state->port_clock,
> +                                                             crtc_state->lane_count);
>         }
>  
> -       for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
> +       for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
>                 crtc_state->pipe_bpp = bpp;
>  
>                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
> -                                                      crtc_state->pipe_bpp,
> -                                                      false);
> +                                                      dsc ? bpp << 4 : crtc_state->pipe_bpp,
> +                                                      dsc);
> +
>                 slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
> -                                                     connector->port, crtc_state->pbn);
> +                                                     connector->port,
> +                                                     crtc_state->pbn);
>                 if (slots == -EDEADLK)
>                         return slots;
>                 if (slots >= 0) {
> @@ -101,11 +106,32 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
>         if (ret && slots >= 0)
>                 slots = ret;
>  
> -       if (slots < 0) {
> +       if (slots < 0)
>                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
>                             slots);
> +
> +       return slots;
> +}
> +
> +
> +static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> +                                           struct intel_crtc_state *crtc_state,
> +                                           struct drm_connector_state *conn_state,
> +                                           struct link_config_limits *limits)
> +{
> +       const struct drm_display_mode *adjusted_mode =
> +               &crtc_state->hw.adjusted_mode;
> +       struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> +       struct intel_dp *intel_dp = &intel_mst->primary->dp;
> +       bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
> +       int slots = -EINVAL;
> +
> +       slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state, limits->max_bpp,
> +                                                    limits->min_bpp, limits,
> +                                                    conn_state, 2 * 3, false);
> +
> +       if (slots < 0)
>                 return slots;
> -       }
>  
>         intel_link_compute_m_n(crtc_state->pipe_bpp,
>                                crtc_state->lane_count,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index c4f92edbdd08..72d63f293987 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -44,10 +44,14 @@ 
 #include "intel_hotplug.h"
 #include "skl_scaler.h"
 
-static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
-					    struct intel_crtc_state *crtc_state,
-					    struct drm_connector_state *conn_state,
-					    struct link_config_limits *limits)
+static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
+						struct intel_crtc_state *crtc_state,
+						int max_bpp,
+						int min_bpp,
+						struct link_config_limits *limits,
+						struct drm_connector_state *conn_state,
+						int step,
+						bool dsc)
 {
 	struct drm_atomic_state *state = crtc_state->uapi.state;
 	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
@@ -58,7 +62,6 @@  static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
-	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
 	int bpp, slots = -EINVAL;
 	int ret = 0;
 
@@ -72,18 +75,20 @@  static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
 	// TODO: Handle pbn_div changes by adding a new MST helper
 	if (!mst_state->pbn_div) {
 		mst_state->pbn_div = drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
-							      limits->max_rate,
-							      limits->max_lane_count);
+							      crtc_state->port_clock,
+							      crtc_state->lane_count);
 	}
 
-	for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
+	for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
 		crtc_state->pipe_bpp = bpp;
 
 		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
-						       crtc_state->pipe_bpp,
-						       false);
+						       dsc ? bpp << 4 : crtc_state->pipe_bpp,
+						       dsc);
+
 		slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
-						      connector->port, crtc_state->pbn);
+						      connector->port,
+						      crtc_state->pbn);
 		if (slots == -EDEADLK)
 			return slots;
 		if (slots >= 0) {
@@ -101,11 +106,32 @@  static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
 	if (ret && slots >= 0)
 		slots = ret;
 
-	if (slots < 0) {
+	if (slots < 0)
 		drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
 			    slots);
+
+	return slots;
+}
+
+
+static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
+					    struct intel_crtc_state *crtc_state,
+					    struct drm_connector_state *conn_state,
+					    struct link_config_limits *limits)
+{
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->hw.adjusted_mode;
+	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
+	struct intel_dp *intel_dp = &intel_mst->primary->dp;
+	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
+	int slots = -EINVAL;
+
+	slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state, limits->max_bpp,
+						     limits->min_bpp, limits,
+						     conn_state, 2 * 3, false);
+
+	if (slots < 0)
 		return slots;
-	}
 
 	intel_link_compute_m_n(crtc_state->pipe_bpp,
 			       crtc_state->lane_count,