From patchwork Tue Sep 20 09:00:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunfeng Yun X-Patchwork-Id: 12981643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72F0BECAAD8 for ; Tue, 20 Sep 2022 09:01:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 607A010E468; Tue, 20 Sep 2022 09:01:07 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by gabe.freedesktop.org (Postfix) with ESMTPS id 850DB10E472 for ; Tue, 20 Sep 2022 09:01:01 +0000 (UTC) X-UUID: 2ef7ae4d88f4493e8461bb8720430304-20220920 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Ttq0pKiSe6uVcSj6n9DaO3vOaI+EVmioWYw/ksaT8H8=; b=JwpM9j3OVmvwAXbdYoOjmykM8X+m4ld1RJOzGtd9zGvfXrMCS1Az+cn7zwLzGaxukuv/0Zx5rFbGqAicrdKoQFlfPj+3j6ZrNP6QaWHaPHbkH7a4ElrQBsnxGmswTsqKya4md/GIT5mLW3CP4xiGORkzG6rDCaQ/7HaE/sjX5nI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11, REQID:3b9d98c5-312a-4053-baa9-de2bf2ebb0bb, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:39a5ff1, CLOUDID:debd6670-dafa-4a42-b716-cf2cd4845592, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 2ef7ae4d88f4493e8461bb8720430304-20220920 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1965133039; Tue, 20 Sep 2022 17:00:55 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 20 Sep 2022 17:00:41 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 20 Sep 2022 17:00:40 +0800 From: Chunfeng Yun To: Chun-Kuang Hu , Vinod Koul Subject: [PATCH 01/18] phy: mediatek: add a new helper to update bitfield Date: Tue, 20 Sep 2022 17:00:21 +0800 Message-ID: <20220920090038.15133-2-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920090038.15133-1-chunfeng.yun@mediatek.com> References: <20220920090038.15133-1-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jitao Shi , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Kishon Vijay Abraham I , Matthias Brugger , linux-mediatek@lists.infradead.org, Chunfeng Yun , Stanley Chu , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Due to FIELD_PREP() macro can be used to prepare a bitfield value, local ones can be remove; add the new helper to make bitfield update easier. Signed-off-by: Chunfeng Yun --- drivers/phy/mediatek/phy-mtk-io.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/phy/mediatek/phy-mtk-io.h b/drivers/phy/mediatek/phy-mtk-io.h index 500fcdab165d..a723d4afc9b4 100644 --- a/drivers/phy/mediatek/phy-mtk-io.h +++ b/drivers/phy/mediatek/phy-mtk-io.h @@ -8,6 +8,7 @@ #ifndef __PHY_MTK_H__ #define __PHY_MTK_H__ +#include #include static inline void mtk_phy_clear_bits(void __iomem *reg, u32 bits) @@ -35,4 +36,10 @@ static inline void mtk_phy_update_bits(void __iomem *reg, u32 mask, u32 val) writel(tmp, reg); } +/* field @mask should be constant and continuous */ +static inline void mtk_phy_update_field(void __iomem *reg, u32 mask, u32 val) +{ + mtk_phy_update_bits(reg, mask, FIELD_PREP(mask, val)); +} + #endif