| Message ID | 20220928175223.15225-4-a-bhatia1@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add DSS support for AM625 SoC | expand |
On 28/09/2022 20:52, Aradhya Bhatia wrote: > Add support for the DSS controller on TI's new AM625 SoC in the tidss > driver. > > The first video port (VP0) in am625-dss can output OLDI signals through > 2 OLDI TXes. A 3rd port has been added with "DISPC_VP_OLDI" bus type. > > Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> > --- > drivers/gpu/drm/tidss/tidss_dispc.c | 61 ++++++++++++++++++++++++++++- > drivers/gpu/drm/tidss/tidss_dispc.h | 3 ++ > drivers/gpu/drm/tidss/tidss_drv.c | 1 + > 3 files changed, 64 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c > index dd3c6a606ae2..34f0da4bb3e3 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -93,6 +93,7 @@ const struct dispc_features dispc_k2g_feats = { > .common_regs = tidss_k2g_common_regs, > > .num_vps = 1, > + .num_max_ports = 1, I would just use "num_ports" here, as it describes the HW (e.g. we have num_vps = 4 for J7, even if we'd only use one of the VPs). I would also rename "TIDSS_MAX_PORTS". Maybe TIDSS_MAX_VPS. And check carefully that it's never used for the output ports. Or maybe this field should be "num_output_ports", and try to use "output port" term in the driver for the..., well, output ports, to make the distinction between the videoport and output port more clear. Tomi
On 28/09/2022 20:52, Aradhya Bhatia wrote: > Add support for the DSS controller on TI's new AM625 SoC in the tidss > driver. > > The first video port (VP0) in am625-dss can output OLDI signals through > 2 OLDI TXes. A 3rd port has been added with "DISPC_VP_OLDI" bus type. > > Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> > --- > drivers/gpu/drm/tidss/tidss_dispc.c | 61 ++++++++++++++++++++++++++++- > drivers/gpu/drm/tidss/tidss_dispc.h | 3 ++ > drivers/gpu/drm/tidss/tidss_drv.c | 1 + > 3 files changed, 64 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c > index dd3c6a606ae2..34f0da4bb3e3 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -93,6 +93,7 @@ const struct dispc_features dispc_k2g_feats = { > .common_regs = tidss_k2g_common_regs, > > .num_vps = 1, > + .num_max_ports = 1, > .vp_name = { "vp1" }, > .ovr_name = { "ovr1" }, > .vpclk_name = { "vp1" }, > @@ -168,6 +169,7 @@ const struct dispc_features dispc_am65x_feats = { > .common_regs = tidss_am65x_common_regs, > > .num_vps = 2, > + .num_max_ports = 2, > .vp_name = { "vp1", "vp2" }, > .ovr_name = { "ovr1", "ovr2" }, > .vpclk_name = { "vp1", "vp2" }, > @@ -257,6 +259,7 @@ const struct dispc_features dispc_j721e_feats = { > .common_regs = tidss_j721e_common_regs, > > .num_vps = 4, > + .num_max_ports = 4, > .vp_name = { "vp1", "vp2", "vp3", "vp4" }, > .ovr_name = { "ovr1", "ovr2", "ovr3", "ovr4" }, > .vpclk_name = { "vp1", "vp2", "vp3", "vp4" }, > @@ -275,6 +278,57 @@ const struct dispc_features dispc_j721e_feats = { > .vid_order = { 1, 3, 0, 2 }, > }; > > +const struct dispc_features dispc_am625_feats = { > + .max_pclk_khz = { > + [DISPC_VP_DPI] = 165000, > + [DISPC_VP_OLDI] = 165000, > + }, > + > + .scaling = { > + .in_width_max_5tap_rgb = 1280, > + .in_width_max_3tap_rgb = 2560, > + .in_width_max_5tap_yuv = 2560, > + .in_width_max_3tap_yuv = 4096, > + .upscale_limit = 16, > + .downscale_limit_5tap = 4, > + .downscale_limit_3tap = 2, > + /* > + * The max supported pixel inc value is 255. The value > + * of pixel inc is calculated like this: 1+(xinc-1)*bpp. > + * The maximum bpp of all formats supported by the HW > + * is 8. So the maximum supported xinc value is 32, > + * because 1+(32-1)*8 < 255 < 1+(33-1)*4. > + */ > + .xinc_max = 32, > + }, > + > + .subrev = DISPC_AM625, > + > + .common = "common", > + .common_regs = tidss_am65x_common_regs, > + > + .num_vps = 2, > + /* note: the 3rd port is not representative of a 3rd pipeline */ > + .num_max_ports = 3, > + .vp_name = { "vp1", "vp2" }, > + .ovr_name = { "ovr1", "ovr2" }, > + .vpclk_name = { "vp1", "vp2" }, > + .vp_bus_type = { DISPC_VP_OLDI, DISPC_VP_DPI, DISPC_VP_OLDI }, Here, for example, we have an issue with the VP vs port. vp_bus_type is of size TIDSS_MAX_PORTS (VPs), but you're using it for output ports. If we did not have J7, which has 4 VPs, we'd have an overflow bug here. The meaning of vp_sub_type also becomes a bit unclear. I guess it's rather "output_port_bus_type"? Tomi
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index dd3c6a606ae2..34f0da4bb3e3 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -93,6 +93,7 @@ const struct dispc_features dispc_k2g_feats = { .common_regs = tidss_k2g_common_regs, .num_vps = 1, + .num_max_ports = 1, .vp_name = { "vp1" }, .ovr_name = { "ovr1" }, .vpclk_name = { "vp1" }, @@ -168,6 +169,7 @@ const struct dispc_features dispc_am65x_feats = { .common_regs = tidss_am65x_common_regs, .num_vps = 2, + .num_max_ports = 2, .vp_name = { "vp1", "vp2" }, .ovr_name = { "ovr1", "ovr2" }, .vpclk_name = { "vp1", "vp2" }, @@ -257,6 +259,7 @@ const struct dispc_features dispc_j721e_feats = { .common_regs = tidss_j721e_common_regs, .num_vps = 4, + .num_max_ports = 4, .vp_name = { "vp1", "vp2", "vp3", "vp4" }, .ovr_name = { "ovr1", "ovr2", "ovr3", "ovr4" }, .vpclk_name = { "vp1", "vp2", "vp3", "vp4" }, @@ -275,6 +278,57 @@ const struct dispc_features dispc_j721e_feats = { .vid_order = { 1, 3, 0, 2 }, }; +const struct dispc_features dispc_am625_feats = { + .max_pclk_khz = { + [DISPC_VP_DPI] = 165000, + [DISPC_VP_OLDI] = 165000, + }, + + .scaling = { + .in_width_max_5tap_rgb = 1280, + .in_width_max_3tap_rgb = 2560, + .in_width_max_5tap_yuv = 2560, + .in_width_max_3tap_yuv = 4096, + .upscale_limit = 16, + .downscale_limit_5tap = 4, + .downscale_limit_3tap = 2, + /* + * The max supported pixel inc value is 255. The value + * of pixel inc is calculated like this: 1+(xinc-1)*bpp. + * The maximum bpp of all formats supported by the HW + * is 8. So the maximum supported xinc value is 32, + * because 1+(32-1)*8 < 255 < 1+(33-1)*4. + */ + .xinc_max = 32, + }, + + .subrev = DISPC_AM625, + + .common = "common", + .common_regs = tidss_am65x_common_regs, + + .num_vps = 2, + /* note: the 3rd port is not representative of a 3rd pipeline */ + .num_max_ports = 3, + .vp_name = { "vp1", "vp2" }, + .ovr_name = { "ovr1", "ovr2" }, + .vpclk_name = { "vp1", "vp2" }, + .vp_bus_type = { DISPC_VP_OLDI, DISPC_VP_DPI, DISPC_VP_OLDI }, + + .vp_feat = { .color = { + .has_ctm = true, + .gamma_size = 256, + .gamma_type = TIDSS_GAMMA_8BIT, + }, + }, + + .num_planes = 2, + /* note: vid is plane_id 0 and vidl1 is plane_id 1 */ + .vid_name = { "vid", "vidl1" }, + .vid_lite = { false, true, }, + .vid_order = { 1, 0 }, +}; + static const u16 *dispc_common_regmap; struct dss_vp_data { @@ -778,6 +832,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc) return dispc_k2g_read_and_clear_irqstatus(dispc); case DISPC_AM65X: case DISPC_J721E: + case DISPC_AM625: return dispc_k3_read_and_clear_irqstatus(dispc); default: WARN_ON(1); @@ -793,6 +848,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask) break; case DISPC_AM65X: case DISPC_J721E: + case DISPC_AM625: dispc_k3_set_irqenable(dispc, mask); break; default: @@ -1282,6 +1338,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, x, y, layer); break; case DISPC_AM65X: + case DISPC_AM625: dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport, x, y, layer); break; @@ -2205,6 +2262,7 @@ static void dispc_plane_init(struct dispc_device *dispc) break; case DISPC_AM65X: case DISPC_J721E: + case DISPC_AM625: dispc_k3_plane_init(dispc); break; default: @@ -2310,6 +2368,7 @@ static void dispc_vp_write_gamma_table(struct dispc_device *dispc, dispc_k2g_vp_write_gamma_table(dispc, hw_videoport); break; case DISPC_AM65X: + case DISPC_AM625: dispc_am65x_vp_write_gamma_table(dispc, hw_videoport); break; case DISPC_J721E: @@ -2583,7 +2642,7 @@ int dispc_runtime_resume(struct dispc_device *dispc) REG_GET(dispc, DSS_SYSSTATUS, 2, 2), REG_GET(dispc, DSS_SYSSTATUS, 3, 3)); - if (dispc->feat->subrev == DISPC_AM65X) + if (dispc->feat->subrev == DISPC_AM65X || dispc->feat->subrev == DISPC_AM625) dev_dbg(dispc->dev, "OLDI RESETDONE %d,%d,%d\n", REG_GET(dispc, DSS_SYSSTATUS, 5, 5), REG_GET(dispc, DSS_SYSSTATUS, 6, 6), diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h index e49432f0abf5..b66418e583ee 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -61,6 +61,7 @@ enum dispc_dss_subrevision { DISPC_K2G, DISPC_AM65X, DISPC_J721E, + DISPC_AM625, }; struct dispc_features { @@ -74,6 +75,7 @@ struct dispc_features { const char *common; const u16 *common_regs; u32 num_vps; + u32 num_max_ports; const char *vp_name[TIDSS_MAX_PORTS]; /* Should match dt reg names */ const char *ovr_name[TIDSS_MAX_PORTS]; /* Should match dt reg names */ const char *vpclk_name[TIDSS_MAX_PORTS]; /* Should match dt clk names */ @@ -88,6 +90,7 @@ struct dispc_features { extern const struct dispc_features dispc_k2g_feats; extern const struct dispc_features dispc_am65x_feats; extern const struct dispc_features dispc_j721e_feats; +extern const struct dispc_features dispc_am625_feats; void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask); dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc); diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tidss_drv.c index 04cfff89ee51..326059e99696 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -235,6 +235,7 @@ static const struct of_device_id tidss_of_table[] = { { .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, }, { .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, }, { .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, }, + { .compatible = "ti,am625-dss", .data = &dispc_am625_feats, }, { } };
Add support for the DSS controller on TI's new AM625 SoC in the tidss driver. The first video port (VP0) in am625-dss can output OLDI signals through 2 OLDI TXes. A 3rd port has been added with "DISPC_VP_OLDI" bus type. Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> --- drivers/gpu/drm/tidss/tidss_dispc.c | 61 ++++++++++++++++++++++++++++- drivers/gpu/drm/tidss/tidss_dispc.h | 3 ++ drivers/gpu/drm/tidss/tidss_drv.c | 1 + 3 files changed, 64 insertions(+), 1 deletion(-)