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([109.52.206.103]) by smtp.gmail.com with ESMTPSA id 26-20020a170906329a00b0077f5e96129fsm3569894ejw.158.2022.10.01.23.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Oct 2022 23:45:46 -0700 (PDT) From: Michael Trimarchi To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , David Airlie , Daniel Vetter Subject: [RFC PATCH 2/4] phy: rockchip: Add inno_is_valid_phy_mode Date: Sun, 2 Oct 2022 08:45:38 +0200 Message-Id: <20221002064540.2500257-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221002064540.2500257-1-michael@amarulasolutions.com> References: <20221002064540.2500257-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Kishon Vijay Abraham I , linux-rockchip@lists.infradead.org, Vinod Koul , linux-phy@lists.infradead.org, linux-amarula@amarulasolutions.com, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The function is used to avoid to enable clock on the hardware if the mode requested is invalid Signed-off-by: Michael Trimarchi --- .../phy/rockchip/phy-rockchip-inno-dsidphy.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c index 630e01b5c19b..644cf73cfd53 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c @@ -217,6 +217,20 @@ static void phy_update_bits(struct inno_dsidphy *inno, writel(tmp, inno->phy_base + reg); } +static int inno_is_valid_phy_mode(struct inno_dsidphy *inno) +{ + switch (inno->mode) { + case PHY_MODE_MIPI_DPHY: + break; + case PHY_MODE_LVDS: + break; + default: + return -EINVAL; + } + + return 0; +}; + static unsigned long inno_dsidphy_pll_calc_rate(struct inno_dsidphy *inno, unsigned long rate) { @@ -495,6 +509,11 @@ static void inno_dsidphy_lvds_mode_enable(struct inno_dsidphy *inno) static int inno_dsidphy_power_on(struct phy *phy) { struct inno_dsidphy *inno = phy_get_drvdata(phy); + int ret = 0; + + ret = inno_is_valid_phy_mode(inno); + if (ret) + return ret; clk_prepare_enable(inno->pclk_phy); clk_prepare_enable(inno->ref_clk);