diff mbox series

drm/i915/guc: Remove excessive line feeds in state dumps

Message ID 20221031220007.4176835-1-John.C.Harrison@Intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/guc: Remove excessive line feeds in state dumps | expand

Commit Message

John Harrison Oct. 31, 2022, 10 p.m. UTC 
From: John Harrison <John.C.Harrison@Intel.com>

Some of the GuC state dump messages were adding extra line feeds. When
printing via a DRM printer to dmesg, for example, that messes up the
log formatting as it loses any prefixing from the printer. Given that
the extra line feeds are just in the middle of random bits of GuC
state, there isn't any real need for them. So just remove them
completely.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c            | 4 ++--
 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Umesh Nerlige Ramappa Nov. 3, 2022, 6:59 p.m. UTC | #1 
On Mon, Oct 31, 2022 at 03:00:07PM -0700, John.C.Harrison@Intel.com wrote:
>From: John Harrison <John.C.Harrison@Intel.com>
>
>Some of the GuC state dump messages were adding extra line feeds. When
>printing via a DRM printer to dmesg, for example, that messes up the
>log formatting as it loses any prefixing from the printer. Given that
>the extra line feeds are just in the middle of random bits of GuC
>state, there isn't any real need for them. So just remove them
>completely.
>
>Signed-off-by: John Harrison <John.C.Harrison@Intel.com>

lgtm,

Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

>---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c            | 4 ++--
> drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 ++++----
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>index 27b09ba1d295f..1bcd61bb50f89 100644
>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>@@ -871,14 +871,14 @@ void intel_guc_load_status(struct intel_guc *guc, struct drm_printer *p)
> 		u32 status = intel_uncore_read(uncore, GUC_STATUS);
> 		u32 i;
>
>-		drm_printf(p, "\nGuC status 0x%08x:\n", status);
>+		drm_printf(p, "GuC status 0x%08x:\n", status);
> 		drm_printf(p, "\tBootrom status = 0x%x\n",
> 			   (status & GS_BOOTROM_MASK) >> GS_BOOTROM_SHIFT);
> 		drm_printf(p, "\tuKernel status = 0x%x\n",
> 			   (status & GS_UKERNEL_MASK) >> GS_UKERNEL_SHIFT);
> 		drm_printf(p, "\tMIA Core status = 0x%x\n",
> 			   (status & GS_MIA_MASK) >> GS_MIA_SHIFT);
>-		drm_puts(p, "\nScratch registers:\n");
>+		drm_puts(p, "Scratch registers:\n");
> 		for (i = 0; i < 16; i++) {
> 			drm_printf(p, "\t%2d: \t0x%x\n",
> 				   i, intel_uncore_read(uncore, SOFT_SCRATCH(i)));
>diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>index 4ccb29f9ac55c..4dbdac8002e32 100644
>--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>@@ -4901,7 +4901,7 @@ void intel_guc_submission_print_info(struct intel_guc *guc,
>
> 	drm_printf(p, "GuC Number Outstanding Submission G2H: %u\n",
> 		   atomic_read(&guc->outstanding_submission_g2h));
>-	drm_printf(p, "GuC tasklet count: %u\n\n",
>+	drm_printf(p, "GuC tasklet count: %u\n",
> 		   atomic_read(&sched_engine->tasklet.count));
>
> 	spin_lock_irqsave(&sched_engine->lock, flags);
>@@ -4949,7 +4949,7 @@ static inline void guc_log_context(struct drm_printer *p,
> 		   atomic_read(&ce->pin_count));
> 	drm_printf(p, "\t\tGuC ID Ref Count: %u\n",
> 		   atomic_read(&ce->guc_id.ref));
>-	drm_printf(p, "\t\tSchedule State: 0x%x\n\n",
>+	drm_printf(p, "\t\tSchedule State: 0x%x\n",
> 		   ce->guc_state.sched_state);
> }
>
>@@ -4978,7 +4978,7 @@ void intel_guc_submission_print_context_info(struct intel_guc *guc,
> 					   READ_ONCE(*ce->parallel.guc.wq_head));
> 				drm_printf(p, "\t\tWQI Tail: %u\n",
> 					   READ_ONCE(*ce->parallel.guc.wq_tail));
>-				drm_printf(p, "\t\tWQI Status: %u\n\n",
>+				drm_printf(p, "\t\tWQI Status: %u\n",
> 					   READ_ONCE(*ce->parallel.guc.wq_status));
> 			}
>
>@@ -4986,7 +4986,7 @@ void intel_guc_submission_print_context_info(struct intel_guc *guc,
> 			    emit_bb_start_parent_no_preempt_mid_batch) {
> 				u8 i;
>
>-				drm_printf(p, "\t\tChildren Go: %u\n\n",
>+				drm_printf(p, "\t\tChildren Go: %u\n",
> 					   get_children_go_value(ce));
> 				for (i = 0; i < ce->parallel.number_children; ++i)
> 					drm_printf(p, "\t\tChildren Join: %u\n",
>-- 
>2.37.3
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 27b09ba1d295f..1bcd61bb50f89 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -871,14 +871,14 @@  void intel_guc_load_status(struct intel_guc *guc, struct drm_printer *p)
 		u32 status = intel_uncore_read(uncore, GUC_STATUS);
 		u32 i;
 
-		drm_printf(p, "\nGuC status 0x%08x:\n", status);
+		drm_printf(p, "GuC status 0x%08x:\n", status);
 		drm_printf(p, "\tBootrom status = 0x%x\n",
 			   (status & GS_BOOTROM_MASK) >> GS_BOOTROM_SHIFT);
 		drm_printf(p, "\tuKernel status = 0x%x\n",
 			   (status & GS_UKERNEL_MASK) >> GS_UKERNEL_SHIFT);
 		drm_printf(p, "\tMIA Core status = 0x%x\n",
 			   (status & GS_MIA_MASK) >> GS_MIA_SHIFT);
-		drm_puts(p, "\nScratch registers:\n");
+		drm_puts(p, "Scratch registers:\n");
 		for (i = 0; i < 16; i++) {
 			drm_printf(p, "\t%2d: \t0x%x\n",
 				   i, intel_uncore_read(uncore, SOFT_SCRATCH(i)));
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 4ccb29f9ac55c..4dbdac8002e32 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4901,7 +4901,7 @@  void intel_guc_submission_print_info(struct intel_guc *guc,
 
 	drm_printf(p, "GuC Number Outstanding Submission G2H: %u\n",
 		   atomic_read(&guc->outstanding_submission_g2h));
-	drm_printf(p, "GuC tasklet count: %u\n\n",
+	drm_printf(p, "GuC tasklet count: %u\n",
 		   atomic_read(&sched_engine->tasklet.count));
 
 	spin_lock_irqsave(&sched_engine->lock, flags);
@@ -4949,7 +4949,7 @@  static inline void guc_log_context(struct drm_printer *p,
 		   atomic_read(&ce->pin_count));
 	drm_printf(p, "\t\tGuC ID Ref Count: %u\n",
 		   atomic_read(&ce->guc_id.ref));
-	drm_printf(p, "\t\tSchedule State: 0x%x\n\n",
+	drm_printf(p, "\t\tSchedule State: 0x%x\n",
 		   ce->guc_state.sched_state);
 }
 
@@ -4978,7 +4978,7 @@  void intel_guc_submission_print_context_info(struct intel_guc *guc,
 					   READ_ONCE(*ce->parallel.guc.wq_head));
 				drm_printf(p, "\t\tWQI Tail: %u\n",
 					   READ_ONCE(*ce->parallel.guc.wq_tail));
-				drm_printf(p, "\t\tWQI Status: %u\n\n",
+				drm_printf(p, "\t\tWQI Status: %u\n",
 					   READ_ONCE(*ce->parallel.guc.wq_status));
 			}
 
@@ -4986,7 +4986,7 @@  void intel_guc_submission_print_context_info(struct intel_guc *guc,
 			    emit_bb_start_parent_no_preempt_mid_batch) {
 				u8 i;
 
-				drm_printf(p, "\t\tChildren Go: %u\n\n",
+				drm_printf(p, "\t\tChildren Go: %u\n",
 					   get_children_go_value(ce));
 				for (i = 0; i < ce->parallel.number_children; ++i)
 					drm_printf(p, "\t\tChildren Join: %u\n",